Interconnection Structure Etch Stop and Diffusion Barrier Method

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Solution Overview

Problem

The semiconductor integrated circuit (IC) industry faces challenges in forming reliable interconnection structures due to the complexity of integrating conductive lines and dielectric materials, particularly in maintaining the integrity of these structures during etching processes, which can lead to issues like oxidation and ion bombardment damage.

Innovation Solution

A method involving the formation of an etch stop layer, a dielectric layer, and subsequent diffusion barrier layers to protect underlying structures during etching, using techniques like chemical vapor deposition and atomic layer deposition to ensure precise and conformal coverage, thereby preventing oxidation and ion bombardment damage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional etching processes are used to form interconnection structures, then manufacturing simplicity is maintained, but oxidation and ion bombardment damage occur reducing reliability

Engineering Contradiction:
Improveinterconnection structure integrityVSAvoidoxidation and ion bombardment damage
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

A diffusion barrier layer is introduced as an intermediary between the conductive line and the etched dielectric material. This barrier layer prevents direct exposure of the conductive line to oxidizing environments and ion bombardment during etching, thereby protecting the interconnection structure from damage while maintaining manufacturing feasibility

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The diffusion barrier layer creates an inert protective environment around the conductive line during etching processes. By forming a conformal barrier that seals the conductive line, the system prevents harmful oxidation and ion bombardment without requiring complex process changes

Inventive Principle:
Principle #39Inert atmosphere (Inert environment)

2Reliability

If diffusion barrier layers are deposited to protect conductive lines, then reliability improves by preventing oxidation and ion bombardment damage, but device complexity increases

Engineering Contradiction:
Improveinterconnection structure integrityVSAvoidnumber of layers and deposition processes
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent optimizes the deposition parameters including thickness control (e.g., 50-200 nm range), deposition temperature, and material composition to achieve effective protection with minimal additional complexity. By carefully controlling these parameters, the diffusion barrier layer provides maximum protection while minimizing the number of required process steps

Inventive Principle:
Principle #35Parameter changes

3Reliability

If conformal coverage is achieved through precise deposition techniques, then adhesion between metal and dielectric improves, but manufacturing precision requirements increase

Engineering Contradiction:
Improveadhesion between metal and dielectricVSAvoiddeposition uniformity and conformality
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

Surface preparation steps are performed prior to diffusion barrier layer deposition to ensure optimal adhesion. The conductive line surface is pre-treated to enhance chemical bonding, allowing the subsequent barrier layer to achieve conformal coverage with reduced precision requirements during the actual deposition process

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The diffusion barrier layer uses composite material structures combining different materials with complementary properties. This composite approach enables achieving both conformal coverage and strong adhesion while tolerating broader manufacturing variations through the synergistic properties of multiple materials

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method enhances the reliability of interconnection structures by preventing oxidation and ion bombardment damage, reducing contact resistance, and improving adhesion between metal and dielectric materials, leading to more stable and efficient semiconductor device performance.

Implementation Method 1

depositing a first diffusion barrier layer into the deepened first hole until the lateral recesses are overfilled... preventing oxidation and ion bombardment damage

Methodology Applied
Scientific EffectOxidation prevention: Oxidation

Implementation Method 2

depositing a first diffusion barrier layer into the deepened first hole until the lateral recesses are overfilled... preventing oxidation and ion bombardment damage

Methodology Applied
Scientific EffectIon bombardment protection: Ion Beam

Implementation Method 3

using techniques like chemical vapor deposition and atomic layer deposition to ensure precise and conformal coverage

Methodology Applied
Scientific EffectChemical vapor deposition: Chemical Vapour Deposition

Implementation Method 4

using techniques like chemical vapor deposition and atomic layer deposition to ensure precise and conformal coverage

Methodology Applied
Scientific EffectAtomic layer deposition:

Data Source

PatentUS11011467B2Method of forming interconnection structure
Publication Date: 2021.05.18 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11011467B2 patent drawing
  • US11011467B2 patent drawing
  • US11011467B2 patent drawing

AI summary

A method includes depositing an etch stop layer over a non-insulator structure and a dielectric layer over the etch stop layer; etching the dielectric layer to form a first hole in the dielectric layer; deepening the first hole into the etch stop layer such that the non-insulator structure is exposed at a bottom of the deepened hole; after the non-insulator structure is exposed, performing a cleaning operation to remove etch byproducts from the deepened first hole, wherein the cleaning operation results in lateral recesses laterally extending from a bottom portion of the deepened first hole into the etch stop layer; depositing a first diffusion barrier layer into the deepened first hole until the lateral recesses are overfilled; depositing a second diffusion barrier layer over the first diffusion barrier layer; and depositing one or more conductive layers over the second diffusion barrier layer.