Dual Damascene Interconnection Structure with Protective Liner

Resolve Bottlenecks,
Find Innovative SolutionsGenerate Solutions

Solution Overview

Problem

The dual damascene process faces challenges in achieving precise dimensional control and preventing over-etching in the formation of interconnection structures for ultra-large scale integrated (ULSI) circuit technology, particularly in protecting the non-insulator structures during the etching process.

Innovation Solution

The method involves forming a liner layer and a dielectric structure on a non-insulator structure, followed by the creation of via and trench openings, with the use of protective layers to prevent over-etching and ensure precise control, including the deposition of silicon nitride layers using techniques like CVD and ALD, and the subsequent formation of conductive structures separated from the bottom surface to avoid electrical connections.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If the dual damascene process is used to form interconnection structures with smaller feature sizes, then dimensional control is improved, but the risk of over-etching and damage to non-insulator structures increases

Engineering Contradiction:

Improvedimensional controlVSAvoidover-etching damage

Core Design Contradiction:

Manufacturing precisionVSObject-affected harmful factors

Solution Approach 1:

A protective layer is formed over the non-insulator structure before etching the dielectric structure. This preliminary protective action prevents over-etching damage to the non-insulator structure while allowing precise dimensional control of the interconnection features during the subsequent etching process.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The protective layer acts as an intermediary between the etching process and the non-insulator structure. It mediates the etching process by providing a barrier that prevents direct contact between the etchant and the non-insulator structure, thereby preventing damage while allowing the etching to proceed with precise dimensional control.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Reliability

If protective layers are added to prevent over-etching, then reliability is improved, but device complexity increases

Engineering Contradiction:

Improveprotection against over-etchingVSAvoidprocess steps

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The protective layer serves multiple functions: it protects the non-insulator structure from over-etching damage, provides a planar surface for subsequent processing steps, and can be selectively removed to expose the non-insulator structure. This multi-functionality reduces the need for additional separate process steps, thereby limiting the increase in device complexity.

Inventive Principle:

Principle #6Universality (Multi-functionality)

3Ease of operation

If the non-insulator structure is exposed by removing the liner layer, then ease of operation is improved, but the risk of electrical connection errors increases

Engineering Contradiction:

Improveaccess to non-insulator structureVSAvoidelectrical connection integrity

Core Design Contradiction:

Ease of operationVSReliability

Solution Approach 1:

The protective layer is selectively removed only in specific locations where the non-insulator structure needs to be exposed for electrical connection. This localized removal maintains the protective barrier in other areas, preventing unintended electrical connections while providing easy access where needed. The conductive structure is then formed to establish reliable electrical connections only at the intended locations.

Inventive Principle:

Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables precise control over interconnection structures, prevents over-etching, and ensures reliable electrical connections, enhancing the performance and reliability of ULSI circuits by maintaining the integrity of non-insulator structures during the etching process.

Implementation Method 1

the deposition of silicon nitride layers using techniques like CVD and ALD

Methodology Applied

Scientific EffectChemical Vapour Deposition: Chemical Vapour Deposition

Implementation Method 2

the deposition of silicon nitride layers using techniques like CVD and ALD

Methodology Applied

Scientific EffectAtomic Layer Deposition:

Data Source

PatentUS10541204B2Interconnection structure and method of forming the same

Publication Date: 2020.01.21 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

An interconnection structure includes a non-insulator structure, a dielectric structure, and a conductive structure. The dielectric structure is present on the non-insulator structure. The dielectric structure has a trench opening and a via opening therein. The trench opening has a bottom surface and at least one recess in the bottom surface. The via opening is present between the trench opening and the non-insulator structure. The conductive structure is present in the trench opening and the via opening and electrically connected to the non-insulator structure. The conductive structure is at least separated from the bottom of the recess.