Interconnection Substrate Adhesion Layer for Semiconductor Yield
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Solution Overview
Problem
In semiconductor devices, the reduction in interconnection resistance and dielectric constant of insulating films to enhance response speed is hindered by decreased adhesion between laminated insulating films, leading to film rupture and reduced yield and reliability.
Innovation Solution
An interconnection substrate with a first insulating film and a second insulating film combined using a component with a structure represented by Si—CXHY—Si, where y is equal to 2x and is an even integer, along with an adhesion enhancing layer, to increase adhesion and reliability in multilayer interconnections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of stationary object
If wiring thickness is reduced to reduce cross-section area, then volume of insulating films is reduced, but interconnection resistance increases
Solution Approach 1:
The patent changes the material composition parameter of the insulating films by incorporating organic groups to achieve lower dielectric constants. This allows for reduced insulating film thickness without proportionally increasing interconnection resistance, as the lowered dielectric constant compensates for the reduced spacing between conductors.
Data Source
AI summary
An interconnection substrate including: a first insulating film made of a silicon compound, an adhesion enhancing layer formed on the first insulating film, and a second insulting film made of a silicon compound and formed on the adhesion enhancing layer, wherein the first insulating film and the second insulating film are combined together with a component having a structure represented by General Formula (1) described below:Si—CXHY—Si General Formula (1)where y is equal to 2x and is an even integer.