Inter-digitated Back-to-Back MOSFETs for Compact Battery Protection
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Solution Overview
Problem
Conventional back-to-back MOSFET configurations in battery protection circuit modules require significant dead space for isolation and channel stops, leading to high source-to-source resistance and fragility due to thin substrates, which limits the compactness and yield of the devices.
Innovation Solution
The inter-digitation of MOSFETs into narrow segments reduces lateral spacing, eliminating the need for back-grinding and thick back metal, allowing for a compact design with shallow trench isolation and a single or dual metal layer configuration to enhance chip stability and efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional back-to-back MOSFET configurations are used with separate termination regions and channel stops, then device isolation is achieved, but chip area increases and source-to-source resistance increases
Solution Approach 1:
The patent divides the MOSFET structure into inter-digitated segments where first and second MOSFETs are formed in an alternating pattern. This segmentation allows the MOSFETs to share common termination regions and channel stops, eliminating the need for separate isolation structures between each device. The alternating arrangement enables compact packing while maintaining proper electrical isolation through the shared termination regions.
Solution Approach 2:
The patent merges the termination regions and channel stops into common shared structures that serve multiple MOSFETs simultaneously. Instead of having separate termination regions for each MOSFET, the inter-digitated configuration allows adjacent MOSFETs to share these critical isolation structures, reducing the total chip area required while maintaining device isolation and electrical performance.
2Stability of the object's composition
If back-grinding and thick back metal are used for isolation, then device stability is improved, but manufacturing complexity and cost increase
Solution Approach 1:
The inter-digitated segmentation allows the device to achieve stability through its structural arrangement rather than through aggressive substrate thinning. The alternating MOSFET pattern with shared termination regions provides inherent mechanical support and electrical isolation, eliminating the need for back-grinding to thin substrate levels while maintaining chip stability.
Solution Approach 2:
The patent extracts and eliminates the back-grinding and thick back metal processing steps from the manufacturing flow. By using the inter-digitated configuration with shared termination regions, the device achieves proper isolation and stability without requiring these additional manufacturing steps, thereby simplifying the fabrication process and reducing cost.
3Reliability
If significant dead space is allocated for isolation structures, then device isolation is ensured, but source-to-source resistance increases
Solution Approach 1:
The inter-digitated segmentation creates alternating regions of first and second MOSFETs that share common termination regions. This arrangement minimizes the dead space between devices while ensuring proper isolation through the shared termination structures. The compact alternating pattern reduces the lateral distance between source regions, thereby reducing source-to-source resistance while maintaining device isolation.
4Area of stationary object
If thin substrates are used to reduce chip area, then compactness is improved, but device fragility increases
Solution Approach 1:
The inter-digitated segmented structure provides distributed mechanical support throughout the chip area. The alternating MOSFET pattern with shared termination regions creates a more uniform stress distribution compared to large continuous isolation regions, allowing the use of thinner substrates without compromising overall chip strength and fragility resistance.
Data Source
AI summary
A bi-directional switch device includes two inter-digitated back-to-back vertical metal oxide semiconductor field effect transistors (MOSFETs) formed on a substrate with their drains connected together, but otherwise isolated from each other.