Interface Board Terminal Group for MCP Crack Detection
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Solution Overview
Problem
Multichip packages (MCPs) with multiple semiconductor chips face challenges in testing, particularly when a second type semiconductor chip may be damaged during the transfer or preparation process for testing, leading to potential crack defects that are not detected until a final test on a first type semiconductor chip, causing inefficiencies and additional testing costs.
Innovation Solution
An interface board is designed with specific terminal groups to test both types of semiconductor chips, where a first upper terminal group connects to the first type chip and a second upper terminal group, connected to a single lower terminal, applies a signal to detect crack defects in the second type chip by measuring current flow, determining non-defectiveness if less than 10 mA current is detected.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If only the first type semiconductor chip is tested in the final test process, then the testing process is simple and fast, but crack defects in the second type semiconductor chip cannot be detected
Solution Approach 1:
The second upper terminal group is designed to serve multiple purposes: it can test the second type semiconductor chip for crack defects and also function as a general testing interface. By making this terminal group multi-functional, the system achieves comprehensive defect detection without adding separate dedicated testing equipment, thus improving reliability while controlling device complexity
Solution Approach 2:
The interface board acts as an intermediary component between the test apparatus and the multichip package. It provides the necessary terminal groups and signal routing capabilities to enable crack defect detection in the second type semiconductor chip during the final test process, without requiring modification of the existing test apparatus
2Reliability
If a separate testing process is added for the second type semiconductor chip, then crack defects can be detected, but testing time and costs increase
Solution Approach 1:
The testing process for the second type semiconductor chip is merged with the existing final test process for the first type semiconductor chip. Both chips are tested simultaneously using the same test apparatus and interface board, eliminating the need for separate testing steps. This integration reduces testing time while ensuring crack defects in the second type chip are detected
Solution Approach 2:
The interface board is pre-configured with the second upper terminal group connected to the second lower terminal, establishing the testing capability for the second type semiconductor chip before the final test process begins. This preliminary setup ensures that crack defect detection is automatically performed during the routine final test without adding time to the process
3Reliability
If the second type semiconductor chip is tested before transfer, then crack defects can be detected early, but additional testing equipment and processes are required
Solution Approach 1:
The interface board's second upper terminal group is designed to be multi-functional, serving both as a connection interface for the second type semiconductor chip and as a testing interface for crack defect detection. This universal design eliminates the need for additional dedicated testing equipment, maintaining simple system configuration while achieving reliable defect detection
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method allows for efficient detection of crack defects in the second type semiconductor chip without additional equipment, reducing testing time and costs by integrating the detection into the existing test process, ensuring the MCP is determined non-defective if the current is within specified limits.
Implementation Method 1
applying a second signal to the multichip package to test whether a crack defect exists in the second type semiconductor chip, and determining the multichip package to be non-defective when a current flowing in the second type semiconductor chip in response to the second signal is less than about 10 mA
Data Source
AI summary
In an interface board for testing a multichip package, the multichip package includes a first type semiconductor chip and a second type semiconductor chip, the interface board includes a first surface facing the multichip package and a second surface facing a test apparatus, the first surface includes upper terminals that are electrically connected to terminals of the multichip package, the second surface includes lower terminals that are electrically connected to the test apparatus, and the upper terminals include a first upper terminal group for testing the first type semiconductor chip and a second upper terminal group for testing whether a crack defect exists in the second type semiconductor chip.