Interface Unit Routing Prioritized Data to Reduce Jitter

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Solution Overview

Problem

Existing computer systems face challenges in efficiently and predictably routing prioritized input data in hard real-time environments, leading to unpredictable variations in processing time known as jitter, which is problematic for systems requiring precise and rapid data processing.

Innovation Solution

The implementation of an interface unit with multiple interface processors and an access management unit that prioritizes and manages access to input data channels, allowing for parallel processing and routing of prioritized data, ensuring that highly prioritized tasks receive preferred access and reducing jitter by managing access at a higher level than the interface processors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a single processor is used in the interface unit to process input data, then the device complexity is reduced, but the processing speed and ability to handle prioritized data efficiently deteriorates

Engineering Contradiction:

Improvedata processing speedVSAvoidinterface unit structure

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

The interface unit is segmented into multiple independent processors (first interface processor and second interface processor), each capable of handling different input data channels simultaneously. This segmentation enables parallel processing of prioritized data without requiring a single complex processor, thus improving productivity while keeping individual processor complexity manageable.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Multiple interface processors are merged into a single interface unit with a unified access management unit. This combination allows the system to leverage parallel processing capabilities while maintaining coordinated control through the shared access management unit, resolving the contradiction between increased processing speed and device complexity.

Inventive Principle:

Principle #5Merging (Combining)

2Reliability

If prioritized data routing is implemented without an access management unit, then the device complexity is lower, but the reliability of hard real-time processing deteriorates due to unpredictable jitter

Engineering Contradiction:

Improvehard real-time processing guaranteeVSAvoidaccess management structure

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

An access management unit is introduced as an intermediary between multiple interface processors and input data channels. This mediator coordinates access requests from different processors, ensures prioritized data receives preferential access, and eliminates unpredictable jitter by providing deterministic scheduling. The intermediary resolves the contradiction by adding controlled complexity that guarantees real-time reliability.

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The access management unit performs preliminary actions by pre-establishing access priorities and scheduling decisions before data processing conflicts occur. By determining access rights in advance based on data priority levels, the system eliminates runtime contention and jitter, ensuring reliable hard real-time processing despite the added structural complexity.

Inventive Principle:

Principle #10Preliminary action

3Productivity

If multiple interface processors are used to process input data in parallel, then the productivity increases, but the difficulty of managing access to input data channels increases

Engineering Contradiction:

Improveparallel processing capabilityVSAvoidaccess management complexity

Core Design Contradiction:

ProductivityVSDifficulty of detecting and measuring

Solution Approach 1:

The access management unit applies uniform access control rules and priority-based scheduling mechanisms to all interface processors regardless of their individual functions. This homogeneous management approach simplifies the coordination of multiple processors by providing consistent access protocols, reducing the difficulty of managing parallel data access while maintaining high productivity.

Inventive Principle:

Principle #33Homogeneity

Data Source

PatentUS10180917B2Interface unit for routing prioritized input data to a processor

Publication Date: 2019.01.15 DSPACE SE & CO KG

AI summary

An interface unit for data exchange between a first processor of a computer system and a peripheral environment. The interface unit has a number of input data channels for receiving input data from the peripheral environment and a first access management unit. The access management unit is configured to receive a request for providing the input data, stored in the number of input data channels, from a first interface processor stored in the interface unit and from a second interface processor stored in the interface unit and to provide or not to provide the input data, stored in the number of input data channels, to the first interface processor and the second interface processor. A first priority and a second priority can be stored in the first access management unit.