Interleaved ADC Clock Skew Calibration Near Nyquist Frequency

Solution Overview

Problem

Existing analog-to-digital converter (ADC) devices face challenges in calibrating clock skew, leading to increased power consumption and longer calibration periods due to the need for complex circuits or off-chip calibration methods.

Innovation Solution

The proposed solution involves an ADC device with multiple ADC circuits, a calibration circuit, and a skew adjusting circuit that analyzes time difference information within even-numbered sampling periods to generate adjustment signals, reducing clock skews without requiring additional complex circuits or off-chip calibration.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If complex circuits (such as an additional reference ADC circuit, auxiliary ADC circuit) or off-chip calibration are used to perform calibration, then clock skew calibration can be achieved, but power consumption increases and calibration period becomes longer

Engineering Contradiction:

Improveclock skew calibration accuracyVSAvoidpower consumption

Core Design Contradiction:

Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent extracts the clock skew calibration function from complex external calibration systems and implements it within the ADC device itself using a simplified internal mechanism. The skew adjusting circuit directly processes quantized outputs from the ADC circuits to generate adjustment signals, eliminating the need for additional reference ADC circuits or off-chip calibration equipment, thereby reducing power consumption while maintaining calibration accuracy.

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The ADC device performs self-calibration through the skew adjusting circuit that automatically analyzes quantized outputs and generates adjustment signals without external intervention. This self-service calibration mechanism eliminates dependency on complex external calibration systems, reducing both power consumption and calibration time while maintaining measurement precision.

Inventive Principle:

Principle #25Self-service

2Measurement precision

If complex circuits (such as an additional reference ADC circuit, auxiliary ADC circuit) or off-chip calibration are used to perform calibration, then clock skew calibration can be achieved, but calibration period becomes longer

Engineering Contradiction:

Improveclock skew calibration accuracyVSAvoidcalibration period

Core Design Contradiction:

Measurement precisionVSLoss of time

Solution Approach 1:

The patent extracts the clock skew calibration function from complex external calibration systems and implements it within the ADC device itself using a simplified internal mechanism. The skew adjusting circuit directly processes quantized outputs from the ADC circuits to generate adjustment signals, eliminating the need for additional reference ADC circuits or off-chip calibration equipment, thereby reducing power consumption while maintaining calibration accuracy.

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The calibration circuit performs preliminary calibration operations on quantized outputs before they are processed by the skew adjusting circuit. This preliminary processing prepares the data in advance, enabling the skew adjusting circuit to quickly generate adjustment signals without requiring lengthy external calibration procedures, thus reducing the overall calibration period while maintaining accuracy.

Inventive Principle:

Principle #10Preliminary action

3Use of energy by moving object

If time difference information within even-numbered sampling periods is analyzed to generate adjustment signals, then power consumption and calibration period are reduced, but calibration effectiveness at frequencies close to Nyquist frequency may be compromised

Engineering Contradiction:

Improvepower consumptionVSAvoidcalibration effectiveness at high frequencies

Core Design Contradiction:

Use of energy by moving objectVSReliability

Solution Approach 1:

The patent applies partial calibration by analyzing only time difference information within even-numbered sampling periods rather than all sampling periods. This partial action reduces computational load and power consumption while the skew adjusting circuit processes this subset of data to generate effective adjustment signals that maintain calibration reliability even at frequencies close to the Nyquist frequency.

Inventive Principle:

Principle #16Partial or excessive action

Data Source

PatentUS11075640B1Analog to digital converter device and method for calibrating clock skew

Publication Date: 2021.07.27 GLOBAL UNICHIP CORPORATION

AI summary

An analog to digital converter (ADC) device includes ADC circuits, a calibration circuit, and a skew adjusting circuit. The ADC circuits are configured to convert an input signal according to interleaved clock signals to generate first quantized outputs. The calibration circuit is configured to perform at least one calibration operation according to the first quantized outputs to generate second quantized outputs. The skew adjusting circuit further includes a first adjusting circuit. The first adjusting circuit is configured to analyze adjacent clock signals according to part of the second quantized outputs to generate adjusting information. The skew adjusting circuit is configured to analyze time difference information within even-numbered sampling periods of the clock signals according to the second quantized outputs and the adjusting information to generate adjustment signals. The adjustment signals are configured to reduce clock skews of the ADC circuits.