Interleaved ADC Gain Calibration With Sample Thresholding
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Solution Overview
Problem
Time-interleaved analog-to-digital converters (ADCs) face challenges due to gain errors between subADCs, leading to oscillatory errors and spurs in the output spectrum, which affect the accuracy of signal conversion.
Innovation Solution
A firmware-based calibration method that estimates and adjusts the gain of subADCs using power estimates and thresholding techniques, ensuring valid samples are used for calibration, and applying correction values to minimize interleaved gain errors, while also employing hardware-thresholding enhancements to stabilize the calibration process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If firmware-based calibration is implemented to reduce gain errors, then measurement precision is improved, but device complexity increases
Solution Approach 1:
The calibration system performs self-calibration by automatically capturing samples, estimating gain errors, and adjusting subADC gains without external intervention. The microprocessor executes calibration algorithms that qualify data blocks, estimate interleaving errors, and apply corrections autonomously, reducing the need for external calibration equipment and manual adjustments.
Solution Approach 2:
The system continuously monitors output samples and uses the estimated gain errors to adjust subADC gains in real-time. The calibration process captures feedback from the actual converter output and uses it to iteratively improve gain matching, creating a closed-loop system that maintains measurement precision under varying operating conditions.
2Measurement precision
If continuous calibration is performed to maintain accuracy, then measurement precision is improved, but productivity decreases
Solution Approach 1:
The calibration system operates periodically rather than continuously, performing gain error estimation and correction at scheduled intervals. The microprocessor can trigger calibration routines at defined periods or when specific conditions are met, allowing normal data conversion to proceed between calibration cycles and maintaining throughput while periodically refreshing accuracy.
Solution Approach 2:
The system performs preliminary qualification of data blocks to determine suitability for calibration before actually executing the calibration algorithm. By pre-screening samples and identifying valid data blocks in advance, the system prepares calibration data beforehand, reducing the time required during actual calibration execution and minimizing impact on overall productivity.
3Measurement precision
If strict data qualification is applied to ensure valid samples, then measurement precision is improved, but loss of time increases
Solution Approach 1:
The qualification process applies necessary checks to ensure calibration validity without being overly restrictive. The system evaluates whether data blocks meet minimum criteria for gain error estimation while avoiding excessive filtering that would discard too many samples. This balanced approach ensures sufficient calibration accuracy without unnecessarily extending qualification time.
Data Source
AI summary
The present disclosure enables firmware-based interleaved-ADC gain calibration and provides hardware-thresholding enhancements. An on-chip memory may store subADC samples and a microprocessor accesses these stored samples for use with the calibration algorithm. Power estimates may be performed using square of each subADC sample to estimate gain error. Thresholding may be applied to the subADC samples, such as Maximum Amplitude Thresholding, Minimum Power Thresholding, and/or using Histogram Output Memory, to determine that samples are valid and may be used for calibration or that subADC data are to be discarded and a new subADC data capture is to be started.