Interleaved ADC Calibration Using Random Pulse Injection
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Interleaved analog-to-digital converters (ADCs) face errors due to gain, timing, and bandwidth mismatches between channels, which existing techniques have not adequately addressed, leading to performance degradation and distortion.
Innovation Solution
The introduction of a correlation-based method that injects a random or pseudo-random dither signal into the sampling network of ADCs, allowing for the calibration of gain and bandwidth mismatches through digital gain estimation using the Least Mean Squares algorithm, with correction possible in both digital and analog domains to align channel characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If interleaved ADC channels operate in parallel with different timing, then sampling throughput is improved, but timing mismatch and phase errors occur between channels
Solution Approach 1:
The patent applies preliminary action by measuring and compensating for timing offsets between channels before actual signal conversion. A calibration signal is injected into each channel, and the measured timing offsets are used to adjust sampling phases in advance, ensuring synchronized operation across all interleaved channels while maintaining high throughput
Solution Approach 2:
The patent implements feedback by continuously measuring timing offsets using injected calibration signals and using these measurements to adjust the sampling phases of each channel. The digital processing unit calculates phase corrections based on measured timing differences and applies these corrections to maintain synchronized sampling across all channels, creating a closed-loop control system
2Ease of manufacture
If channel gain differences exist in interleaved ADCs, then manufacturing simplicity is improved, but gain mismatch causes output errors
Solution Approach 1:
The patent applies feedback by measuring gain differences between channels using injected calibration signals and using these measurements to compute correction factors. The digital processing unit calculates gain correction factors based on the ratio of measured calibration signal amplitudes and applies these corrections to the output of each channel, creating a closed-loop gain matching system
Solution Approach 2:
The patent applies parameter changes by dynamically adjusting the gain of each channel through digital correction factors. Instead of requiring precise physical matching of analog components, the system changes the effective gain parameter of each channel through digital multiplication, allowing gain correction without modifying the physical hardware
3Ease of manufacture
If RC time constants vary between channels, then component tolerances are improved, but bandwidth mismatch and timing errors increase
Solution Approach 1:
The patent applies feedback by measuring the actual frequency response of each channel using swept-frequency calibration signals and using these measurements to compute compensation filters. The system measures the magnitude and phase response at multiple frequencies and designs digital filters that compensate for the measured variations, creating a closed-loop bandwidth matching system
Solution Approach 2:
The patent applies asymmetry by applying different compensation filters to each channel based on their individually measured frequency responses. Instead of requiring symmetric (identical) bandwidth characteristics across channels, the system accepts asymmetric responses and compensates for each channel's unique characteristics through customized digital filtering
4Measurement precision
If digital correction is applied to compensate mismatch, then output accuracy is improved, but computational complexity increases
Solution Approach 1:
The patent applies parameter changes by representing complex filter operations as simple lookup tables of correction factors. Instead of performing complex real-time calculations, the system pre-calculates gain and phase correction factors and stores them in lookup tables, allowing the digital signal processor to apply corrections through simple memory access and multiplication operations
Solution Approach 2:
The patent applies preliminary action by pre-calculating all correction factors during a calibration phase and storing them in lookup tables before actual signal processing begins. The complex computations of measuring frequency responses and designing compensation filters are performed in advance, allowing the main signal processing path to use simple table lookups and multiplications
Data Source
Figure 1
Figure 2
Figure 3A~3B
AI summary
A method and a corresponding device for calibrating an interleaved analog-to-digital converter (ADC) involve injecting a pulsed, substantially-random signal into a plurality of channels in the ADC. After the substantially-random signal is injected, a gain correlation value is determined for each channel, which value indicates a degree of correlation between the injected substantially-random signal and an output of the respective channel. The gain correlation values are then compared to determine a degree of mismatch between the channels. At least one of the channels is calibrated as a function of the determined degree of mismatch.