Interleaved ADC Skew Cancellation via Supply Voltage Adjustment
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Solution Overview
Problem
Time interleaving of analog to digital converters (ADCs) can lead to degraded digital output signal accuracy due to relative differences in performance, such as offsets, gain, and skew between individual ADCs, which affects the overall reassembled digital output signal.
Innovation Solution
An interleaved ADC system that includes skew estimators to estimate the skew values of individual ADCs and adjusts the power supply voltages of these ADCs using a comparator circuit to balance the relative skews, thereby minimizing errors in the digital output signal.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If time interleaving is used to increase sampling rate, then productivity is improved, but measurement precision deteriorates due to skew mismatch between ADCs
Solution Approach 1:
The patent changes the power supply voltage parameter of individual ADCs to adjust their operating characteristics. By varying the voltage, the skew (timing offset) of each ADC is modified to compensate for manufacturing variations, thereby aligning sampling times across interleaved channels and improving measurement precision while maintaining high sampling rate
Solution Approach 2:
The patent replaces physical/mechanical alignment methods with electrical control. Instead of mechanically adjusting ADC timing, the invention uses electrical voltage adjustment through power supply modification to control and equalize skew, achieving timing synchronization through electrical parameter control rather than mechanical means
2Measurement precision
If individual ADCs have different power supply voltages to adjust skew, then measurement precision is improved, but device complexity increases
Solution Approach 1:
The patent implements self-service by having each ADC channel include its own skew estimator that automatically measures its own skew value. This eliminates the need for external complex control systems, as each channel independently monitors and reports its skew, allowing the system to self-adjust through feedback without requiring sophisticated external management infrastructure
3Measurement precision
If skew estimation and voltage adjustment circuitry is added, then measurement precision is improved, but device complexity increases
Solution Approach 1:
The patent merges the skew estimation function directly into the existing ADC channel structure. The skew estimator is integrated with each ADC's power supply control, combining multiple functions (skew measurement, comparison, and voltage adjustment) into a unified per-channel control block. This integration reduces overall circuitry complexity by eliminating separate dedicated circuits for each function
Data Source
AI summary
An interleaved analog to digital converter (“ADC”) includes a first ADC having an input for sampling an analog signal during a first time period, an output for providing a digital signal, and a power supply terminal for receiving a first power supply voltage, a second ADC having an input for sampling the analog signal during a second time period, an output for providing a digital signal, and a power supply terminal for receiving a second power supply voltage, a first skew estimator for estimating a skew value of the first ADC, a second skew estimator for estimating a skew value of the second ADC, and a comparator for comparing the skew values, adjusting the first power supply voltage in response to a first output value of the comparator, and adjusting the second power supply voltage in response to a second output value of the comparator.


