Time-Interleaved ADC Channel Selection for Spur and Routing Control
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Solution Overview
Problem
Time-interleaved analog-to-digital converter (ADC) devices face issues with spur in digital output signals due to ADC mismatches, leading to complex routing within the chip with numerous wires required between timing controllers and ADCs.
Innovation Solution
A time-interleaved ADC device incorporating a random number generator and distributed timing controllers within each ADC to generate selection signals, reducing the need for extensive wiring by selecting digital output signals based on a random number sequence, thereby simplifying chip routing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a timing controller is used to select one of the ADCs to generate the digital output signal, then the spur issue of the digital output signal is solved, but many wires are needed connected between the timing controller and the ADCs, causing difficulty to the routing within the chip
Solution Approach 1:
The patent divides the timing controller functionality into separate timing control circuits within each ADC channel. Each ADC channel has its own timing control circuit that autonomously generates selection signals based on the random number sequence, eliminating the need for a centralized timing controller and its extensive wiring to multiple ADCs.
Solution Approach 2:
Each ADC channel is equipped with its own timing control circuit that self-generates the necessary selection signals using the shared random number sequence. This self-service approach allows each channel to independently determine when it should output its digital signal without requiring external control wires from a central controller.
2Reliability
If more ADCs are used to solve the spur issue, then the digital output signal quality is improved, but the routing within the chip becomes more difficult due to the increased number of wires
Solution Approach 1:
The patent segments the timing control function into distributed timing control circuits within each ADC channel. This segmentation allows multiple ADCs to operate independently with their own control logic, reducing the need for extensive interconnections between a central controller and multiple ADCs, thereby simplifying chip routing while maintaining signal quality.
3Ease of operation
If ADCs are always sequentially used to generate the digital output signal, then the system is simple to control, but the digital output signal has spur due to ADC mismatches
Solution Approach 1:
The patent uses a random number sequence to periodically select different ADC channels for signal output. This periodic switching action, controlled by the random sequence, prevents continuous use of a single ADC channel and reduces spur artifacts caused by ADC mismatches, while maintaining relatively simple control logic through the use of pre-generated random sequences.
Data Source
AI summary
The present invention provides a time-interleaved analog-to-digital converter device, wherein the time-interleaved analog-to-digital converter device includes a random number generator, a plurality of ADCs and an output circuit. The random number generator is configured to generate a random number sequence. The plurality of ADCs are configured to receive an analog input signal to generate a plurality of digital signals, respectively, and each ADC is further configured to generate a selection signal according to the random number sequence. The output circuit is configured to select one of the digital signals according to the selection signals generated by the ADCs, to generate a digital output signal.