Time-Interleaved DAC Calibration for Image Frequency Isolation
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Solution Overview
Problem
The existing methods for calibrating time-interleaved analog-to-digital converters (ADCs) face challenges due to image frequencies generated by digital-to-analog converters (DACs), which can introduce errors by overlapping with desired frequency responses, and require complex and area-intensive anti-alias filters, especially when operating at different sampling rates.
Innovation Solution
A time-interleaved DAC with two sub-DACs operating at different clock phases is used to generate calibration signals, allowing for effective removal of image frequencies through anti-alias filtering and correction of frequency and DC offset mismatches, while an observation ADC samples at twice the sampling frequency using multiple lower-rate clocks to estimate and correct clock skew.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a DAC generates calibration signals, then flexibility in generating different amplitudes and bandwidths is achieved, but image frequencies are generated that overlap with desired frequencies introducing calibration errors
Solution Approach 1:
The patent extracts and removes the harmful image frequency components from the calibration signal spectrum. By using a time-interleaved DAC structure with multiple sub-DACs operating at different clock phases, the image frequencies are separated in the frequency domain and can be selectively removed through filtering, leaving only the desired calibration signal components.
Solution Approach 2:
The patent introduces an anti-alias filter as an intermediary component between the DAC and ADC. This filter acts as a mediator that selectively passes the desired calibration signal frequencies while blocking the harmful image frequencies, thereby preventing calibration errors without affecting the flexibility of signal generation.
2Measurement precision
If a very sharp anti-alias filter is used at the output of the calibration DAC, then image frequencies are removed, but the filter takes up considerable silicon area and suffers from significant losses
Solution Approach 1:
The patent segments the filtering function across multiple time-interleaved sub-DACs rather than requiring a single sharp filter. Each sub-DAC operates at a lower sampling rate, which spreads the image frequencies to lower frequencies that are easier to filter with less aggressive (and thus smaller area) filters. The combined output achieves the required image rejection without needing a single very sharp filter.
3Adaptability or versatility
If multiple LC-filters with RF multiplexing are used for different sampling rates, then ADC operation at different sampling rates is enabled, but even more silicon area is required and implementation becomes more difficult
Solution Approach 1:
The patent creates a universal time-interleaved DAC structure that can operate at multiple sampling rates without requiring separate filters for each rate. The same set of sub-DACs and anti-alias filter can be used across different sampling rates by adjusting the clock phases and frequencies, eliminating the need for multiple dedicated filters and complex RF multiplexing circuitry.
4Area of stationary object
If a single tunable LC-filter is used, then silicon area is reduced, but the filter is only possible within a narrow frequency range
Solution Approach 1:
The patent introduces dynamic clock phase adjustment capability to the time-interleaved DAC structure. By dynamically changing the clock phases and frequencies of the sub-DACs, the system can adapt to different operating frequencies and sampling rates, allowing a single filter design to cover a wide frequency range rather than being limited to a narrow band.
Data Source
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AI summary
A system and method for calibrating a time-interleaved digital-to-analog converter (DAC). A calibration signal generator generates calibration data, and a time-interleaved DAC converts the calibration data to an analog calibration signal. An observation analog-to-digital converter (ADC) samples, and quantizes, the analog calibration signal filtered by an anti-alias filter. A mismatch estimation block estimates a frequency response mismatch between the sub-DACs and generates a sub-DAC mismatch correction factor based on an output of the observation ADC. The calibration signal generator applies the sub-DAC mismatch correction factor to the calibration data. The mismatch estimation block may estimate a DC offset mismatch between the sub-DACs based on the output of the observation ADC and generates a DC offset correction factor, and the calibration signal generator applies the DC offset correction factor to the calibration data.