Time-Interleaved DAC Calibration for Image and Mismatch Correction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing methods for calibrating time-interleaved analog-to-digital converters (ADCs) face challenges in generating bandlimited calibration signals without introducing errors due to image frequencies and require significant silicon area for high-order filters, especially when operating at different sampling rates.
Innovation Solution
Employing a time-interleaved digital-to-analog converter (TI-DAC) with two sub-DACs, clocked at different phases, to generate calibration signals, and using a digital equalizer to compensate for impairments by estimating and correcting mismatches and duty cycle skew through a mismatch estimation block and duty cycle correction block.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a very sharp anti-alias filter is used at the output of the calibration DAC to remove image frequencies, then image frequencies are effectively removed, but the filter takes up considerable silicon area and suffers from significant losses
Solution Approach 1:
The harmful image frequency components are extracted and removed from the calibration signal spectrum through digital signal processing. The system identifies and eliminates specific frequency components (images) that fall within the ADC's frequency range, separating them from the desired calibration signal without requiring physical filtering hardware.
Solution Approach 2:
The patent replaces the mechanical/physical anti-alias filter (LC-filter) with a digital signal processing approach. Instead of using physical components to filter out image frequencies, the system uses digital algorithms to identify and remove image components from the calibration signal, substituting electronic computation for physical filtering.
2Adaptability or versatility
If multiple filters with RF multiplexing function are used to support different sampling rates, then different sampling rates can be accommodated, but even more silicon area is required and implementation becomes more difficult
Solution Approach 1:
The digital signal processing system is designed to handle multiple sampling rates and different calibration scenarios using a single universal algorithm framework. The same digital processing block can adapt to different ADC sampling rates (e.g., 2.5 GS/s, 5 GS/s, 10 GS/s) by adjusting processing parameters, eliminating the need for multiple dedicated filters for different rate scenarios.
Solution Approach 2:
The system dynamically adapts its processing characteristics based on the operating conditions. The digital equalizer and image removal algorithms adjust their parameters and behavior according to the actual ADC sampling rate and calibration requirements, providing flexible adaptation without requiring physical reconfiguration or multiple static filter designs.
3Area of stationary object
If a single tunable LC-filter is used, then silicon area is reduced, but it can only operate within a narrow frequency range
Solution Approach 1:
The system changes its operational parameters through digital processing rather than physical tuning. By modifying digital filter coefficients, sampling rates, and processing algorithms, the system can adapt to different frequency ranges and sampling rates without physical reconfiguration, overcoming the narrow bandwidth limitation of fixed LC-filters.
4Adaptability or versatility
If a digital-to-analog converter is used to generate calibration signals, then flexibility in generating signals of different amplitudes and bandwidths is achieved, but image frequencies are introduced that cause errors in the calibration process
Solution Approach 1:
The patent converts the harmful effect of image frequencies into a manageable problem through digital signal processing. Instead of trying to prevent image generation at the source, the system acknowledges their presence and uses digital algorithms to identify, isolate, and remove them, transforming a calibration error source into a controlled parameter that can be digitally corrected.
Data Source
AI summary
A system and method for calibrating a time-interleaved digital-to-analog converter (DAC). A calibration signal generator generates calibration data, and a time-interleaved DAC converts the calibration data to an analog calibration signal. An observation analog-to-digital converter (ADC) samples, and quantizes, the analog calibration signal filtered by an anti-alias filter. A mismatch estimation block estimates a frequency response mismatch between the sub-DACs and generates a sub-DAC mismatch correction factor based on an output of the observation ADC. The calibration signal generator applies the sub-DAC mismatch correction factor to the calibration data. The mismatch estimation block may estimate a DC offset mismatch between the sub-DACs based on the output of the observation ADC and generates a DC offset correction factor, and the calibration signal generator applies the DC offset correction factor to the calibration data.