Interleaved Matrix Multiplication via Vector Instructions

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Solution Overview

Problem

Current matrix multiplication methods in computing devices are inefficient, requiring numerous instruction cycles and hindering performance in applications that rely heavily on this operation, such as speech recognition and image classification.

Innovation Solution

The method involves creating intermediate matrices by interleaving row and column values from the original matrices, allowing for vector multiplication instructions to perform matrix multiplication more efficiently by reducing the number of instruction cycles required.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If traditional matrix multiplication methods are used, then the operation can be performed with standard algorithms, but the number of instruction cycles required is large and performance is poor

Engineering Contradiction:
Improvematrix multiplication performanceVSAvoidinstruction cycles
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent segments the matrix multiplication operation into multiple intermediate matrices, where each intermediate matrix stores specific elements (e.g., even rows, odd rows, even columns, odd columns) separately. This segmentation allows the processor to perform parallel vector multiplications on different segments simultaneously, reducing the total number of instruction cycles required for complete matrix multiplication.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces an intermediate representation dimension by creating intermediate matrices that organize data in a different structural arrangement than the original matrices. This dimensional transformation enables more efficient memory access patterns and allows vector instructions to operate on multiple elements in parallel, thereby improving computational throughput.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Speed

If standard matrix multiplication algorithms are used, then implementation is straightforward, but efficiency and speed are insufficient for real-time applications

Engineering Contradiction:
Improvematrix multiplication speedVSAvoidalgorithm complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent performs preliminary actions by pre-organizing matrix elements into intermediate matrices before the actual multiplication operation. Elements are pre-sorted and stored in intermediate structures that optimize for vectorized access patterns. This preliminary organization enables subsequent multiplication operations to execute faster through parallel vector instructions, despite the additional setup step.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces intermediate matrices as mediator structures between the input matrices and the final result. These intermediate matrices serve as temporary storage that reorganizes data into patterns optimized for vector multiplication operations. The intermediaries enable the processor to efficiently compute multiple product terms in parallel while maintaining correctness of the mathematical operation.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS10073817B1Optimized matrix multiplication using vector multiplication of interleaved matrix values
Publication Date: 2018.09.11 GOOGLE LLC
  • US10073817B1 patent drawing
  • US10073817B1 patent drawing
  • US10073817B1 patent drawing

AI summary

The present disclosure relates to optimized matrix multiplication using vector multiplication of interleaved matrix values. Two matrices to be multiplied are organized into specially ordered vectors, which are multiplied together to produce a portion of a product matrix.