Interleaved Switch Fabric Layout for Bus-Turn-Free Routing
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Solution Overview
Problem
Existing reconfigurable instruction cell array (RICA) switch fabrics face challenges with bus turning, which leads to die space wastage, excessive power consumption, and timing delays due to the need for channel routing across multiple metal layers, and current switch fabric architectures either simplify layout design at the cost of routing flexibility or complicate routing with increased flexibility at the cost of design complexity.
Innovation Solution
The proposed switch fabric architecture eliminates bus turning by interleaving multiplexers across the footprint, allowing channels to be routed directly to their corresponding multiplexers without spanning across other channels, thereby reducing die space usage and routing complexity while maintaining flexibility.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If channels are routed across multiple metal layers to connect switch fabric components, then routing flexibility is improved, but die space is wasted and power consumption increases
Solution Approach 1:
The patent applies dimensionality change by transitioning channel routing from a two-dimensional planar layout to a three-dimensional vertical arrangement using multiple metal layers. Channels are routed through stacked metal layers (e.g., M1, M2, M3) rather than spreading horizontally across the die, allowing vertical interconnection that reduces horizontal die space consumption while maintaining routing flexibility.
2Adaptability or versatility
If channels are routed across multiple metal layers, then routing flexibility is improved, but power consumption becomes excessive
Solution Approach 1:
The patent reduces power consumption by routing channels vertically through stacked metal layers instead of horizontally across long distances. This three-dimensional approach shortens the physical path length for signal transmission, reducing resistive losses and dynamic power consumption associated with long horizontal interconnects.
3Adaptability or versatility
If channels are routed across multiple metal layers, then routing flexibility is improved, but timing delays increase
Solution Approach 1:
The patent reduces timing delays by implementing vertical channel routing through closely-spaced metal layers. The vertical interconnect distance through thin metal layers is significantly shorter than horizontal routing distances, reducing signal propagation delay and improving timing performance while maintaining routing flexibility.
4Ease of manufacture
If switch fabric layout is simplified, then ease of manufacture is improved, but routing flexibility is reduced
Solution Approach 1:
The patent segments the switch fabric into modular switch boxes arranged in a regular grid pattern, with each switch box handling local channel routing. This segmentation simplifies the overall layout design by creating repetitive, manufacturable units while maintaining routing flexibility through the standardized interface and interconnection patterns between modules.
Solution Approach 2:
The patent maintains routing flexibility by implementing vertical channel routing through multiple metal layers within the simplified modular switch box layout. The three-dimensional vertical interconnect structure allows flexible channel routing options without complicating the two-dimensional planar layout, enabling easy manufacturing while preserving adaptability.
Data Source
AI summary
An output switch fabric is disclosed that comprises an interleaved plurality of multiplexers for switching channels between first and second busses. The busses run in tracks that form a grid pattern. The interleaving of the multiplexers is arranged according to the grid pattern for the busses.