Internally Clocked LBIST for Pad Cell Path Testing
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Solution Overview
Problem
Existing logic built-in self-test (LBIST) implementations for integrated circuits face inefficiencies due to the sharing of test access port (TAP) pad cells with functional pads, which limits the testing of internal pad cell paths and exposes safety-critical ICs to electrostatic discharge and electrical overstress.
Innovation Solution
An internally generated digital clock signal is used to perform LBIST, allowing the LBIST logic circuit and auxiliary logic circuit to test any I/O pad cell path by controlling the functional logic circuitry and applying digital logic sequences, thereby accessing all pad cell paths and testing internal paths within the IC, including shared TAP pad cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If TAP pad cells are shared with functional pads, then the number of I/O pads is reduced, but the testing of internal pad cell paths is limited
Solution Approach 1:
The pad cell direction is made dynamic rather than fixed. The shared TAP pad cells can switch between input and output modes based on whether the IC is in test mode or normal operational mode. This dynamic reconfiguration allows the same physical pad to serve multiple testing functions without requiring additional dedicated test pads, thereby maintaining reduced I/O complexity while achieving complete internal path test coverage.
Solution Approach 2:
The parameters of the shared TAP pad cells are changed based on operational mode. During LBIST, the pad direction and control parameters are reconfigured to allow bidirectional testing of internal paths. This parameter change enables the shared pads to provide full test coverage for internal pad cell paths while maintaining their functional I/O capability during normal operation.
2Ease of operation
If TAP pad cell direction is fixed for LBIST, then LBIST operation is simplified, but the pads cannot be used for both test and functional operations
Solution Approach 1:
The pad cell direction control is made dynamic through mode-dependent configuration. In LBIST mode, the shared TAP pad cells are configured with fixed directions suitable for testing. In normal operational mode, the same pad cells switch to their functional I/O directions. This dynamic adaptation allows the system to maintain operational simplicity for LBIST while achieving versatility in pad cell usage across different operational contexts.
Solution Approach 2:
The shared TAP pad cells are designed to perform multiple functions: they serve as both dedicated TAP pads for LBIST operations and as functional I/O pads for normal operation. The auxiliary logic circuit enables this multi-functionality by automatically configuring the pad cells appropriately based on the operational mode, eliminating the need for separate dedicated test pads and functional I/O pads.
3Ease of operation
If external clock signal is used for LBIST, then clocking is simple, but safety-critical ICs are exposed to electrostatic discharge and electrical overstress
Solution Approach 1:
The harmful external clock signal path is extracted and removed from the LBIST operation. Instead of routing external clock signals through vulnerable TAP pad cells, the invention generates the clock signal internally using existing functional logic circuitry and an auxiliary logic circuit. This extraction eliminates the exposure to electrostatic discharge and electrical overstress while maintaining simple clocking operation through internal signal generation.
Solution Approach 2:
An auxiliary logic circuit acts as an intermediary to generate the clock signal internally rather than accepting it from external sources. This intermediary circuitry uses existing functional logic and internal signals to produce the necessary clocking for LBIST operations, thereby mediating between the need for external clock simplicity and the need to avoid harmful external signal exposure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances test coverage and reduces defective parts per million (DPPM) rates, ensuring high reliability and safety by effectively testing pad cell functions and leakage, even in safety-critical applications.
Implementation Method 1
generating the digital clock signal includes using a phase locked loop circuit of the IC
Data Source
AI summary
Embodiments are directed to apparatuses and methods for providing a logic built-in self-test (LBIST) using an LBIST logic circuit and an auxiliary logic circuit. An example method includes using switch circuitry in an integrated circuit (IC) to change modes of operation associated with functional logic circuit, the modes of operation including an LBIST mode and an application mode, and to provide an internally generated digital clock signal to the functional logic circuitry and an LBIST logic circuit in response to the LBIST mode. The method further includes performing an LBIST using the internally generated digital clock signal, the LBIST logic circuit to test select nodes in the IC via control of the functional logic circuitry and via application of digital logic sequences provided as inputs to the I/O pad cells of the IC.