Interposed Substrate Metal Carrier Process
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Solution Overview
Problem
Conventional stacked-type semiconductor device packages using silicon wafers are costly and complex due to the need for passivation layers and additional insulating layers, which complicate the manufacturing process and increase costs.
Innovation Solution
A manufacturing method for an interposed substrate using a metal carrier to form conductive pillars and an insulating material layer, which covers the pillars and is then removed to expose the lower surface, eliminating the need for a silicon wafer and additional insulating layers, thereby simplifying the process and reducing costs while ensuring electrical reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a silicon wafer is used as the interposed substrate and passivation layers are formed to prevent conductive material from entering active areas, then electrical isolation is achieved, but the manufacturing process becomes much more complicated and costs increase
Solution Approach 1:
The invention extracts and removes the passivation layer formation step from the manufacturing process. By using a metal carrier substrate instead of a silicon wafer, the need for passivation layers to isolate conductive material from active circuit areas is eliminated, as the metal carrier inherently provides the necessary isolation without requiring additional processing steps.
Solution Approach 2:
The metal carrier substrate serves multiple functions simultaneously: it provides mechanical support, electrical isolation, and thermal management. This multi-functional approach replaces the need for separate passivation layers that would otherwise be required to achieve electrical isolation in silicon wafer-based processes.
2Strength
If a silicon wafer is used as the interposed substrate, then the substrate provides mechanical support and electrical properties, but the required manufacturing cost is higher
Solution Approach 1:
The invention employs a metal carrier substrate that is cheaper than silicon wafers for the specific application of interposed substrate in stacked semiconductor packaging. The metal carrier performs its function of providing mechanical support and electrical isolation without requiring the high cost associated with silicon wafer fabrication and processing.
3Manufacturing precision
If through silicon vias are formed on a silicon wafer with passivation layers, then vertical conductive paths are created, but additional process steps are required to remove passivation layers after TSV formation
Solution Approach 1:
The metal carrier substrate is prepared in advance with the necessary surface properties and structural characteristics before the TSV formation process begins. This preliminary preparation eliminates the need for subsequent passivation layer removal steps, as the metal carrier inherently allows for direct TSV formation without requiring protective layer management.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method effectively reduces manufacturing costs and simplifies the process while maintaining electrical reliability by covering conductive pillars with an insulating material layer, preventing electrical leakage and erosion by etchants.
Implementation Method 1
The photoresist layer is removed to expose another portion of the metal carrier
Implementation Method 2
An insulating material layer is formed on the metal carrier. The insulating material layer covers the another portion of the metal carrier and encapsulates the conductive pillars and the metal passivation pads
Data Source
AI summary
A manufacturing method of an interposed substrate is provided. A photoresist layer is formed on a metal carrier. The photoresist layer has plural of openings exposing a portion of the metal carrier. Plural of metal passivation pads and plural of conductive pillars are formed in the openings. The metal passivation pads cover a portion of the metal carrier exposed by openings. The conductive pillars are respectively stacked on the metal passivation pads. The photoresist layer is removed to expose another portion of the metal carrier. An insulating material layer is formed on the metal cattier. The insulating material layer covers the another portion of the metal carrier and encapsulates the conductive pillars and the metal passivation pads. An upper surface of the insulating material layer and a top surface of each conductive pillar are coplanar. The metal carrier is removed to expose a lower surface of the insulating material layer.


