Interposer Cavity Package Layout for Shorter Thermal Paths
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Solution Overview
Problem
In interposer-package on package (I-POP) structures, the distance between the heat path block (HPB) and the application processor (AP) chip needs to be reduced to enhance thermal performance.
Innovation Solution
A semiconductor package design incorporating a package substrate, a first semiconductor device, an interposer with lower and upper cavities, and a heat dissipation block, where the interposer includes vertical conductive connectors and heat transfer vias to reduce the distance between the semiconductor device and the heat dissipation block, facilitating efficient heat transfer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If a heat path block (HPB) is applied for heat dissipation of an application processor (AP) chip in an interposer-package on package (I-POP) structure, then thermal performance can be enhanced, but the distance between the heat path block and the application processor chip becomes too large, reducing heat transfer efficiency
Solution Approach 1:
The patent embeds the first semiconductor device partially into a lower cavity formed in the interposer, and places the heat dissipation block into an upper cavity of the interposer. This nesting arrangement allows the heat dissipation block to be positioned much closer to the semiconductor device, reducing the thermal path length while maintaining the I-POP structure.
Solution Approach 2:
The patent utilizes vertical cavities (lower and upper cavities) in the interposer to create a three-dimensional arrangement. By moving components vertically into cavities rather than maintaining a flat planar structure, the thermal path is shortened in the vertical dimension while preserving horizontal spacing for electrical connections.
2Temperature
If the distance between the semiconductor device and heat dissipation block is reduced to improve thermal performance, then heat transfer efficiency increases, but the structural complexity of the interposer increases due to the need for cavities
Solution Approach 1:
The interposer is designed to serve multiple functions: it provides electrical connections through vertical conductive connectors, structural support, thermal management through integrated cavities, and positioning for both semiconductor devices and heat dissipation blocks. By combining these functions into a single component, the overall system complexity is managed despite the advanced features.
Solution Approach 2:
The patent merges the heat dissipation function directly into the interposer structure by forming lower and upper cavities as integral parts of the interposer. This integration eliminates the need for separate heat dissipation components and simplifies the overall assembly process.
3Temperature
If the interposer includes lower and upper cavities to reduce distance between components, then thermal performance improves, but manufacturing complexity increases
Solution Approach 1:
The lower and upper cavities are formed in the interposer before mounting the semiconductor devices and heat dissipation blocks. This preliminary formation of cavities allows for subsequent easy placement of components into the pre-prepared spaces, simplifying the assembly process despite the complex interposer structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design improves thermal performance by reducing the distance between the semiconductor device and the heat dissipation block, allowing for increased thickness of the semiconductor device and enhanced heat transfer rates, thereby improving overall thermal efficiency.
Implementation Method 1
the interposer including a lower cavity on a first interposer region of the interposer having a predetermined depth from a lower surface of the interposer, wherein a portion of the first semiconductor device is in the lower cavity; and an upper cavity on the first interposer region of the interposer having a predetermined depth from an upper surface of the interposer, wherein a portion of the heat dissipation block is in the upper cavity
Data Source
AI summary
A semiconductor package may include a package substrate; a first semiconductor device on the package substrate; a plurality of vertical conductive connectors on the package substrate; an interposer on the package substrate such that the plurality of vertical conductive connectors is between the package substrate and the interposer, the interposer defining a first interposer region and a second interposer region and having a lower cavity in the first interposer region, the lower cavity having a predetermined depth from a lower surface of the interposer; a second semiconductor device on the second interposer region; and a heat dissipation block on the first interposer region, wherein a portion of the first semiconductor device is within the lower cavity.