Interposer Damping Resistor for Capacitive Network Resonance
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Solution Overview
Problem
Conventional semiconductor chip package substrates face challenges in providing sufficient resistive damping due to die size and complexity limitations, leading to resonance issues in capacitive networks, and existing solutions like fabricating doped polysilicon resistors or buried resistors are costly and inefficient.
Innovation Solution
The method involves forming a resistor onboard an interposer to dampen a capacitive network with at least one capacitor positioned external to the interposer, where the resistor's dimensions are determined to provide the required resistance, and it is electrically connected to the capacitive network.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If doped polysilicon resistors or buried on-die resistors are fabricated to provide damping, then resonance is reduced, but die size and complexity increase and manufacturing cost rises
Solution Approach 1:
The damping resistor is extracted from the semiconductor die and relocated to the package substrate. This separation allows the die to remain simple while the substrate provides the necessary damping function through separately fabricated resistive elements, thus reducing die size and complexity while maintaining damping performance.
Solution Approach 2:
The package substrate acts as an intermediary between the semiconductor die and the external capacitive network. By placing the damping resistor on the substrate rather than on the die, the substrate mediates the damping function, allowing the die to focus solely on its primary function while the substrate handles power delivery and damping requirements.
2Reliability
If controller equivalent series resistance (ESR) capacitors are fabricated with resistive elements to provide damping, then resonance is reduced, but manufacturing cost increases significantly
Solution Approach 1:
The damping function is segmented from the capacitor and implemented as a separate resistive element on the package substrate. This segmentation allows the capacitor to be a standard, low-cost component while the damping resistor is implemented using standard PCB trace or discrete resistor techniques, avoiding the need for expensive custom ESR capacitors.
Solution Approach 2:
Instead of changing the capacitor's intrinsic parameters (fabricating special ESR capacitors), the solution changes the system configuration by adding a separate resistive element. This parameter change approach uses standard manufacturing processes for both capacitors and resistors, significantly reducing manufacturing cost compared to specialized ESR capacitor fabrication.
3Ease of manufacture
If conventional package substrates are used without additional damping elements, then manufacturing is simpler, but resonance issues occur due to insufficient resistive damping
Solution Approach 1:
The damping resistor is merged into the package substrate design rather than being a separate component. By integrating the resistive element directly into the substrate layer structure (using PCB traces or substrate materials), the solution maintains manufacturing simplicity while providing the necessary damping to ensure power delivery stability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively addresses resonance issues in semiconductor chip package substrates by providing sufficient damping without the need for costly additional components, enhancing power delivery stability and reducing noise in integrated circuits.
Implementation Method 1
forming a resistor onboard an interposer. The resistor is adapted to dampen a capacitive network
Data Source
AI summary
Various resistor circuits and methods of making and using the same are disclosed. In one aspect, a method of manufacturing is provided that includes forming a resistor onboard an interposer. The resistor is adapted to dampen a capacitive network. The capacitive network has at least one capacitor positioned external to the interposer.