Interposer Package Mold Geometry for Chip Alignment Under Warpage
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The fabrication of semiconductor packages using silicon-based interposers can lead to wafer warpage due to differences in thermal expansion coefficients, causing misalignment between semiconductor chips and pads.
Innovation Solution
A semiconductor package design featuring a mold layer with constant sloped side walls and specific trench angles, along with a circuit board, interposer structure, and semiconductor chips, ensures reliable electrical connections and alignment.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a semiconductor chip is mounted on a silicon-based interposer and then molded with molding material, then the semiconductor package can be fabricated, but wafer warpage occurs due to difference in coefficient of thermal expansion between thin silicon and thick silicon
Solution Approach 1:
The mold layer is formed prior to mounting the semiconductor chip on the interposer. This preliminary formation of the mold layer with its specific geometric configuration (constant slope and bottom angle ≤90°) prevents wafer warpage from occurring during subsequent processing steps by providing a stable structural foundation that compensates for thermal expansion differences.
Solution Approach 2:
The invention changes the geometric parameters of the mold layer, specifically setting the bottom angle between the side wall and bottom surface to less than or equal to 90 degrees. This parameter optimization prevents warpage propagation and maintains alignment precision during the molding process by controlling stress distribution in the semiconductor chip.
2Ease of operation
If the semiconductor chip is thin, then mounting and molding can be performed, but wafer warpage occurs due to coefficient of thermal expansion difference
Solution Approach 1:
The mold layer's bottom angle is optimized to be less than or equal to 90 degrees, which changes the mechanical support parameters for the thin semiconductor chip. This geometric parameter adjustment provides adequate support to thin chips during thermal processing, preventing warpage while maintaining ease of mounting and molding operations.
Solution Approach 2:
The mold layer acts as an intermediary structure between the thin semiconductor chip and the interposer. It provides mechanical support and stress distribution that prevents warpage in thin chips during thermal expansion, enabling easy mounting and molding operations without compromising chip stability.
3Strength
If the semiconductor chip is thick, then structural support is provided, but misalignment occurs between chip and pad during molding
Solution Approach 1:
The constant slope and bottom angle (≤90°) of the mold layer are specifically designed to work with thick semiconductor chips. These geometric parameters control the stress distribution and thermal expansion behavior, preventing misalignment between the chip and pad during molding while maintaining the structural support provided by thick chips.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design improves the reliability and stability of the semiconductor package by preventing warpage and ensuring precise chip alignment, enhancing electrical connectivity and package integrity.
Implementation Method 1
wafer warpage may occur due to a difference in coefficient of thermal expansion (CTE) between silicon of a thin thickness and silicon of a thick thickness
Data Source
AI summary
A semiconductor package includes a circuit board, an interposer structure on the circuit board, a first semiconductor chip and a second semiconductor chip on the interposer structure, the first and the second semiconductor chips electrically connected to the interposer structure and spaced apart from each other, and a mold layer between the first and second semiconductor chips, the mold layer separating the first and second semiconductor chips. A slope of a side wall of the mold layer is constant as the side wall extends away from an upper side of the interposer structure, and an angle defined by a bottom side of the mold layer and the side wall of the mold layer is less than or equal to ninety degrees.