Interposer UBM Offset Layout for Thermal Crack Resistance
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Solution Overview
Problem
Existing semiconductor packaging technologies face challenges in efficiently bonding integrated circuit chips to substrates due to the increased density and three-dimensional integration, leading to issues such as cracking and delamination during thermal testing.
Innovation Solution
The use of under bump metallurgy (UBM) laterally offset from through vias in an interposer, combined with a dielectric buffer layer, to reduce mechanical stress and enhance thermal stability, along with a simplified manufacturing process involving a single ashing step for UBM formation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If multiple processing steps are used for UBM formation, then manufacturing precision is improved, but device complexity increases
Solution Approach 1:
The patent combines multiple UBM formation processing steps into a single integrated process. The UBM structure is formed through one continuous processing sequence that accomplishes what previously required multiple separate steps, thereby reducing device complexity while maintaining manufacturing precision.
Solution Approach 2:
The UBM formation process is designed to perform multiple functions simultaneously - creating the metallurgical bond interface, establishing electrical connectivity, and providing mechanical support all in one processing sequence, reducing the need for separate specialized steps.
2Ease of manufacture
If through vias are directly bonded to substrates, then manufacturing simplicity is improved, but reliability deteriorates due to cracking and delamination
Solution Approach 1:
The UBM structure serves as an intermediary element between the through vias and the substrate. This intermediate metallurgical layer absorbs thermal stress and prevents direct stress transmission that would cause cracking and delamination, thereby improving reliability without complicating the manufacturing process.
Solution Approach 2:
The UBM structure is formed in advance as a protective cushioning layer that anticipates and prevents thermal stress damage. This pre-formed metallurgical interface acts as a buffer against future thermal cycling stresses that would otherwise cause bonding failures.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the likelihood of cracking and delamination during thermal testing while lowering manufacturing costs by minimizing the number of processing steps and materials used.
Implementation Method 1
The use of under bump metallurgy (UBM) laterally offset from through vias in an interposer, combined with a dielectric buffer layer, to reduce mechanical stress and enhance thermal stability
Implementation Method 2
The use of under bump metallurgy (UBM) laterally offset from through vias in an interposer, combined with a dielectric buffer layer, to reduce mechanical stress and enhance thermal stability
Data Source
AI summary
In an embodiment, a device includes: a substrate having a first side and a second side opposite the first side; an interconnect structure adjacent the first side of the substrate; and an integrated circuit device attached to the interconnect structure; a through via extending from the first side of the substrate to the second side of the substrate, the through via being electrically connected to the integrated circuit device; an under bump metallurgy (UBM) adjacent the second side of the substrate and contacting the through via; a conductive bump on the UBM, the conductive bump and the UBM being a continuous conductive material, the conductive bump laterally offset from the through via; and an underfill surrounding the UBM and the conductive bump.