Low-Profile Microelectronic Package Using Inverted BBUL Structure
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Solution Overview
Problem
Existing microelectronic device packaging technologies face challenges in achieving low profile heights, especially for mobile solutions, where size reduction and thermal management are critical, and existing solutions often compromise on package height or thermal efficiency.
Innovation Solution
The use of bumpless build-up layer (BBUL) technology with an inverted package configuration, where the microelectronic die is routed out to BGA pads on the same side as the package, allowing for a low-profile design and enabling efficient thermal management by adjusting the die's embedding depth within the package substrate, and supporting package-on-package (POP) architectures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If conventional packaging technologies are used, then device protection and electrical connection are achieved, but package height is excessive for mobile applications
Solution Approach 1:
The patent inverts the conventional package structure by placing the die on the bottom surface of the package substrate rather than on top. This inversion allows the interconnect structures to extend upward from the bottom, enabling the die to be positioned at a lower elevation and significantly reducing the overall package height while maintaining all necessary protective and electrical connection functions
Solution Approach 2:
The patent repositions the die from the traditional top-surface location to the bottom-surface location, utilizing the vertical dimension differently. This dimensional reconfiguration allows the package to achieve low profile height by redistributing components along the z-axis, with the die at the bottom and interconnect structures extending upward through the substrate
2Length of moving object
If package height is reduced, then compactness is improved, but thermal management capability deteriorates
Solution Approach 1:
The package substrate serves as an intermediary thermal management structure, with embedded thermal vias and heat dissipation pathways that conduct heat away from the die. The inverted configuration allows thermal management structures to be integrated within the substrate itself, providing efficient heat sinking despite the reduced package height
Solution Approach 2:
The patent modifies the thermal conduction parameters by integrating thermal vias and heat dissipation structures within the package substrate. The inverted die configuration changes the thermal pathway, allowing heat to be conducted through the substrate and dissipated more effectively in the low-profile design
3Area of stationary object
If die is positioned on top of package substrate, then electrical connection is simplified, but space utilization is inefficient
Solution Approach 1:
By inverting the die position to the bottom surface, the patent maximizes the utilization of the package substrate area. This configuration allows the interconnect structures to extend upward through the substrate, enabling efficient space utilization while the electrical connection complexity is managed through the inverted interconnect architecture
Data Source
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AI summary
A low-profile microelectronic package includes a die (110) (having a first surface (111) and a second surface (112)) and a package substrate (120). The substrate includes an electrically insulating layer (121) that forms a first side (126) of the substrate, an electrically conductive layer (122) connected to the die, and a protective layer (123) over the conductive layer that forms a second side (127) of the substrate. The first surface of the die is located at the first side of the substrate. The insulating layer has a plurality of pads (130) formed therein. The package further includes an array of interconnect structures (140) located at the first side of the substrate. Each interconnect structure in the array of interconnect structures has a first end (141) and a second end (142), and the first end is connected to one of the pads.