Multi-Level Inverter Control for Inner Switch Voltage Protection
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Solution Overview
Problem
Three-level inverters, particularly active neutral point clamped (ANPC) inverters, face a high voltage stress issue during power-down and cross-over points between half-cycles, which can damage inner switches due to excessive voltage across their drain-to-source terminals.
Innovation Solution
The implementation of an extended Ton high voltage protection circuit that delays the turn-off of inner switches until after the outer switches have been turned off, along with a PWM switching logic that controls six switches using only two PWM signal channels, ensuring safe operation and reducing high voltage stress by managing switch node voltage transitions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If inner switches are turned off before outer switches during power-down and cross-over points, then switching speed is improved, but high voltage stress damages the inner switches
Solution Approach 1:
The control circuit detects the off-state of outer switches before turning off the inner switches during power-down and cross-over points. This preliminary detection and delayed turn-off sequence prevents high voltage stress from damaging the inner switches while maintaining efficient switching operation.
2Manufacturing precision
If six PWM signal channels are used to control six switches, then switch control precision is improved, but device complexity increases
Solution Approach 1:
The control circuit generates control signals for six switches by combining only two complementary PWM signal channels with switching logic. This merging approach reduces the number of required PWM signal channels from six to two while maintaining precise control of all switches through logical combination of the reduced signal set.
Data Source
AI summary
A control circuit for an inverter. The control circuit includes a first pulse width modulation (PWM) module configured to produce first and second complementary PWM signals, and a second PWM module configured to produce a third and fourth complementary PWM signals. PWM switching logic is coupled to the first and second PWM modules and is adapted to be coupled to a switch network. The switch network includes first, second, third, and fourth switches coupled in series between a first voltage terminal and a second voltage terminal. The PWM switching logic is configured to produce control signals for each of the first, second, third, and fourth switches in response to the first and second complementary PWM signals and to the third and fourth complementary PWM signals.