Ac-Dc Conversion TRIZ Cases

A multi-stage switched-capacitor module balances flying-capacitor voltage and equalizes unit current without added control complexity.

Opposed synchronizing signals let hard-parallel converter sub-modules share power without intermediary inductors, cutting cost, space, and failure risk.

Switching the DESAT terminal to the switch cathode prevents false trips during DC link capacitor discharge under high load currents.

Soft timer synchronization lets slave PWM boards keep interlaced phase outputs aligned during master restarts without interrupt coupling.

A dual charger lets one module charge the battery while the other generates Joule heat, avoiding separate heaters in cold conditions.

A passive RC metering circuit replaces current transformers and summing amplifiers to regulate inverter capacitor voltage without magnetic saturation.

Phase-shifted PWM grouping and mode switching let parallel DC-DC converters cut output ripple while maintaining efficiency across load changes.

Controllable battery modules switch in series for variable voltage while decentralized fault signals trigger shutdown for safer mobile high-power supply.

A larger protective-film corner radius than the interlayer edge reduces thermal-stress cracking and preserves breakdown voltage in SiC power semiconductors.

Dynamic switching in a three-level converter cuts losses and heat while maintaining high inverter efficiency in grid-connected and off-grid modes.

Multi-mode control uses CFLY voltage feedback and current sensing to limit peak current while keeping the flying capacitor near VOUT/2.

Modular battery cells and selective series-parallel switching raise portable AC output power while limiting weight and thermal losses.

Switching a split capacitor within the inverter EMI filter shifts resonance away from grid harmonics, suppressing distortion without extra hardware.

Sequential switch turn-on and turn-off timing limits startup and shutdown voltage stress in ANPC three-level converters.

A programmable low-impedance off-state path and negative Vgs suppress Miller-induced gate glitches and parasitic turn-on in inverter transistors.

Two inverter cell groups with different DC voltages enable fast voltage jumps, fine tuning, and lower switching losses under changing tissue loads.

Isolating DC neutral points between unit power converters blocks short-circuit current paths, preventing failure spread without fuses.

Dual-loop voltage control combines instantaneous feedback with orthogonal RMS compensation to improve three-phase inverter response and stability.

A current-limiting precharge path slows initial capacitor charging to suppress semiconductor overvoltage and enable lower-voltage components.

Controllable rectifier and inverter stages regulate the DC bus, enable reversibility, and keep polyphase generator output at constant frequency.

A staged startup with DC voltage adjustment keeps DC link current within semiconductor ratings and prevents converter overcurrent.

By modeling zero-order hold and time delay in discrete motor voltage equations, this case improves inverter current stability at lower sampling rates.

Delayed inner-switch turn-off and two-channel PWM logic prevent ANPC inverter voltage stress during power-down and half-cycle crossover.

A predictive flux correction approach keeps transformer magnetic flux within limits during fast voltage changes, avoiding saturation and overcurrent.

Dynamic voltage limiting suppresses fault overcurrents in virtual synchronous power converters while avoiding shutdown during grid disturbances.

Pre-charge resistors and staged MMC capacitor charging synchronize the harmonic filter with the grid while limiting inrush current.

Alternating power across adjacent induction coils promotes liquid convection, reducing temperature nonuniformity and scorching across pot sizes.

Series switches, a flying capacitor, and an auxiliary switch limit converter voltage stress while cutting high-voltage switch cost and complexity.