I/O Buffer Swing Reduction Circuit for BTI-Stable MOSFET Gates

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Solution Overview

Problem

Bias Temperature Instability (BTI) effects cause performance degradation in metal-oxide-semiconductor field-effect-transistors (MOSFETs), particularly in input/output (I/O) buffer circuits due to voltage swings from supply voltages, leading to reliability issues and overdesign trade-offs in existing techniques.

Innovation Solution

A swing reduction circuit is introduced, comprising p-type and n-type swing reduction circuits coupled to the gates of pMOSFETs and nMOSFETs in I/O buffer circuits, which adjust the voltage swing magnitude to minimize BTI effects by increasing the lower bound of voltage for p-type MOSFETs and decreasing the higher bound for n-type MOSFETs, thereby reducing device degradation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If supply voltages are reduced to save power and accommodate smaller MOSFET sizes, then power consumption is reduced and device scaling is enabled, but Bias Temperature Instability (BTI) effects cause threshold voltage changes and performance degradation

Engineering Contradiction:

Improvepower consumptionVSAvoidMOSFET threshold voltage stability

Core Design Contradiction:

Use of energy by moving objectVSReliability

Solution Approach 1:

The swing reduction circuit applies preliminary anti-action by preemptively reducing the voltage swing magnitude at MOSFET gates before BTI effects can cause significant threshold voltage shifts. By limiting the gate voltage excursion range, the circuit prevents the stress conditions that accelerate BTI degradation, thereby maintaining threshold voltage stability while operating at reduced supply voltages for lower power consumption

Inventive Principle:

Principle #9Preliminary anti-action

2Reliability

If existing techniques are used to mitigate BTI effects, then reliability is improved, but overdesign trade-offs result in increased area or timing compromises

Engineering Contradiction:

ImproveI/O buffer circuit reliabilityVSAvoidcircuit area and timing

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The swing reduction circuit acts as an intermediary component inserted between the I/O buffer and the rest of the system. This mediator limits voltage swings to protective levels without requiring redesign of the core I/O buffer or other circuit elements. The intermediary approach achieves reliability improvement while avoiding the area and timing penalties associated with overdesigning the buffer itself or adding complex compensation circuits

Inventive Principle:

Principle #24Intermediary (Mediator)

Data Source

PatentUS11190187B2Temperature instability-aware circuit

Publication Date: 2021.11.30 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

A circuit includes: a first swing reduction circuit coupled between an input/output pad and a buffer circuit, and a second swing reduction circuit coupled between the input/output pad and the buffer circuit. The first swing reduction circuit comprises a first transistor gated by a first bias voltage and comprises a second transistor drained by the first bias voltage. The first swing reduction circuit is configured to increase a voltage at a first node in the buffer circuit when a voltage applied on the input/output pad is equal to a first supply voltage. The second swing reduction circuit is configured to reduce a voltage at a second node in the buffer circuit when the voltage applied on the input/output pad is equal to a second supply voltage.