I/O Interface Circuit Testing for IC Coverage
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Solution Overview
Problem
Traditional scan chain testing methods are inadequate in fully detecting all areas of an integrated circuit, particularly combinational logics directly connected to I/O interfaces, due to limitations in test coverage and the inability to effectively test internal circuits of I/O interfaces.
Innovation Solution
A circuit testing system comprising a control circuit and an I/O interface circuit that receives a scan control signal to propagate scan test signals and response signals between a test machine and a circuit under test, enhancing detection coverage by eliminating the need for scan wrappers and allowing direct signal transmission during the capture mode.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional scan chain testing methods are used, then the testing process is simple, but the test coverage is insufficient and cannot detect all areas of the integrated circuit
Solution Approach 1:
The patent segments the I/O interface circuit into multiple controllable units (first I/O unit, second I/O unit, third I/O unit) that can be independently configured. Each unit can be set to different states (input state, output state, high-impedance state) to enable comprehensive testing of different circuit areas including combinational logics and internal circuits of I/O interfaces, thereby improving test coverage without requiring a completely new testing architecture.
Solution Approach 2:
The patent introduces dynamic control of I/O interface circuit states through scan control signals. The I/O interface circuit can dynamically switch between input state, output state, and high-impedance state based on the testing phase. This dynamic configurability allows the same hardware to serve multiple testing functions, improving coverage while maintaining system simplicity.
2Reliability
If scan wrappers are added to increase test coverage, then more areas can be tested, but the device complexity increases and some real circuit operation wiring and input/output interfaces still cannot be fully tested
Solution Approach 1:
The patent enables the I/O interface circuit to serve its own testing needs by configuring it to operate in different states. The I/O interface circuit can be set to input state to receive test patterns, output state to propagate response signals, or high-impedance state to isolate itself. This self-service capability eliminates the need for external scan wrappers while achieving comprehensive testing of the I/O interface internal circuits and connected combinational logics.
Solution Approach 2:
The patent makes the I/O interface circuit multi-functional by enabling it to perform both normal operational functions and self-testing functions. Through state control, the same I/O interface circuit can act as a test pattern receiver, a response signal propagator, or an isolated element, eliminating the need for separate dedicated testing structures and reducing overall device complexity.
3Ease of operation
If the I/O interface circuit is configured to receive test patterns during scan mode, then scan chain testing can be performed, but the internal circuits of I/O interfaces cannot be effectively tested
Solution Approach 1:
The patent introduces dynamic state control of the I/O interface circuit based on scan control signals. During scan-in phase, the I/O interface is configured to input state to receive test patterns. During scan-out phase, it switches to output state to propagate response signals. This dynamic reconfiguration enables the I/O interface internal circuits to be effectively tested by observing their behavior in different states, while maintaining ease of operation for standard scan chain testing.
4Extent of automation
If the scan chain method is used to detect each area of the integrated circuit, then systematic testing can be performed, but it is unable to test all areas particularly combinational logics between register and I/O interface
Solution Approach 1:
The patent segments the I/O interface circuit into multiple controllable units that can be independently configured to test different areas. By dividing the I/O interface into first, second, and third units with different state configurations, the system can systematically test combinational logics connected to different I/O interfaces while maintaining automated scan chain operation.
Solution Approach 2:
The patent applies different state configurations to different segments of the I/O interface circuit based on their specific testing needs. The first I/O unit can be set to input state, the second to output state, and the third to high-impedance state, allowing each segment to be optimally configured for its specific testing requirement while maintaining overall systematic automation.
Data Source
AI summary
The present disclosure relates to a circuit testing system, including a control circuit and an I/O interface circuit. The control circuit is electrically connected to a test machine, and is configured to receive a scan control signal. The I/O interface circuit is electrically connected to the control circuit, the test machine, the scan chain circuit and a circuit under test. When the scan control signal is at a first level, the control circuit is configured to control the I/O interface circuit to propagate a scan test signal sended from the test machine to the scan chain circuit. When the scan control signal is at a second level, the control circuit is configured to control the I/O interface circuit to propagate a response signal generated by the circuit under test to the test machine.