I/O Pad ESD Protection Network for Low Standby Leakage

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Solution Overview

Problem

Existing ESD protection networks in semiconductor ICs face challenges in reducing standby leakage power while maintaining effective ESD protection, especially in advanced process nodes where uniform poly-pitch is required.

Innovation Solution

The proposed ESD protection network includes a driver stack, a first ESD device, and a power clamp, with the first ESD device comprising a string of diodes connected between the I/O pad and a reference voltage node, and a second ESD device connected between the I/O pad and another reference voltage node, both designed to reduce leakage current and power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If traditional ESD protection networks are used, then ESD protection is provided, but standby leakage power is high

Engineering Contradiction:
Improvestandby leakage powerVSAvoidESD protection
Core Design Contradiction:
Loss of energyVSReliability

Solution Approach 1:

The ESD protection network transitions from a static always-on configuration to a dynamic configuration that changes based on operational state. During standby mode, the network is configured to minimize leakage current through high-impedance paths. During active mode, the network provides full ESD protection. This dynamic reconfiguration resolves the contradiction by adapting the protection level to the operational requirements.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The ESD protection network is divided into multiple independent protection paths with different characteristics. One path provides low leakage during standby, while another path provides strong protection during active operation. By segmenting the protection function into separate controllable paths, the system can optimize for either low leakage or high protection depending on the operational state, resolving the fundamental trade-off.

Inventive Principle:
Principle #1Segmentation

2Loss of energy

If ESD protection devices are added to reduce leakage, then power consumption is reduced, but device complexity increases

Engineering Contradiction:
Improvepower consumptionVSAvoidESD protection network complexity
Core Design Contradiction:
Loss of energyVSDevice complexity

Solution Approach 1:

The ESD protection network is designed so that the same structural elements serve multiple functions: providing ESD protection during active operation and minimizing leakage during standby mode. The protection devices and control circuitry work together to achieve both power reduction and protection, eliminating the need for completely separate mechanisms and thereby managing complexity while achieving dual benefits.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The ESD protection function is merged with the power management function in a unified control mechanism. The same control logic that manages power states also configures the ESD protection network, reducing the overall system complexity by combining functions rather than adding separate independent systems.

Inventive Principle:
Principle #5Merging (Combining)

3Volume of moving object

If advanced process nodes are used to reduce device size, then IC size is reduced, but manufacturing precision requirements increase

Engineering Contradiction:
ImproveIC sizeVSAvoidpoly-pitch uniformity
Core Design Contradiction:
Volume of moving objectVSManufacturing precision

Solution Approach 1:

The ESD protection network is designed with parameters optimized for advanced process nodes. The diode strings and transistor sizes are carefully selected to achieve the desired protection characteristics while being compatible with the tighter manufacturing tolerances of advanced nodes. By adjusting design parameters rather than fundamental architecture, the system achieves both small size and manufacturability.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS12300692B2Semiconductor device with ESD protection and methods of operating and configuring the same
Publication Date: 2025.05.13 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12300692B2 patent drawing
  • US12300692B2 patent drawing
  • US12300692B2 patent drawing

AI summary

An electro-static discharge (ESD) protection network for an input/output (I/O) pad includes a driver stack including an upper branch and a lower branch, the upper branch being electrically connected between a first node that has a first reference voltage and the I/O pad, and the lower branch being electrically connected between the I/O pad and a second node that has a second reference voltage; a first ESD device electrically connected between the I/O pad and a third node that has a third reference voltage; and a power clamp between the third node and the second node.