I/O Pad Negative Capacitance Circuit for Higher Bandwidth

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing I/O pad circuits face challenges in reducing pad capacitance without compromising signal integrity, reliability, and ESD performance, especially when implementing weak signal drivers, which can lead to reduced bandwidth and increased channel complexity.

Innovation Solution

The implementation of a negative impedance converter (NIC) circuit that uses a capacitive pad with negative capacitance to cancel out pad capacitance, combined with a comparator and equalization techniques, provides improved signaling quality and reduced pad capacitance without the limitations of traditional bridged T-coil circuits.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If weak signal drivers are implemented by reducing circuit component size, then pad capacitance is reduced and bandwidth is maintained, but signal integrity requirements are compromised and channel complexity increases

Engineering Contradiction:
ImprovebandwidthVSAvoidsignal integrity
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent changes the electrical parameters of the pad circuit by introducing a negative impedance converter that transforms the effective input capacitance from positive to negative values. This parameter transformation allows the pad to maintain low effective capacitance (improving bandwidth) while the actual physical components remain at their design size (maintaining signal integrity and reliability).

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The negative impedance converter acts as an intermediary circuit between the pad and the channel. It mediates the contradiction by presenting a negative capacitance to the channel while the actual pad components maintain their physical integrity, thus resolving the conflict between bandwidth requirements and signal integrity requirements.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Speed

If minimalistic metal routing grid is implemented at the pad, then pad capacitance is reduced, but electromigration and self-heat issues increase and ESD performance deteriorates

Engineering Contradiction:
ImprovebandwidthVSAvoidESD performance
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent transforms the effective electrical parameter (capacitance) from positive to negative through the negative impedance converter. This allows the physical metal grid to maintain its design dimensions for reliability while the effective capacitance is reduced to improve bandwidth, resolving the contradiction between minimalistic routing and ESD performance.

Inventive Principle:
Principle #35Parameter changes

3Speed

If traditional bridged T-coil circuits are used for capacitance reduction, then pad capacitance is reduced, but device complexity and manufacturing difficulty increase

Engineering Contradiction:
ImprovebandwidthVSAvoidcircuit structure
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent uses a negative impedance converter based on operational amplifiers to transform the effective capacitance parameter from positive to negative. This approach achieves capacitance reduction with a more straightforward circuit implementation compared to traditional bridged T-coil circuits, reducing manufacturing complexity while maintaining bandwidth improvement.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The NIC circuit enhances I/O interface performance by increasing bandwidth, reducing electromagnetic interference, and maintaining reliability and ESD performance, making it suitable for variable-frequency operations and multi-lane links like DDR and PCIe.

Implementation Method 1

a negative impedance converter (NIC) circuit that uses a capacitive pad with negative capacitance to cancel out pad capacitance

Methodology Applied
Scientific EffectNegative impedance conversion:

Data Source

PatentUS20240012497A1Input/output capacitance reduction with negative impedance
Publication Date: 2024.01.11 INTEL CORP
  • US20240012497A1 patent drawing
  • US20240012497A1 patent drawing
  • US20240012497A1 patent drawing

AI summary

Data transfer rates input to and output from electronic devices are a function of I/O pad circuit structure. The load capacitance of an I/O pad may reduce the bandwidth of an I/O circuit. A reduced pad capacitance circuit may be used to reduce or eliminate the positive and physical pad capacitance associated with a capacitive pad. This negative capacitance reduces or minimizes poor signal quality arising from large pad capacitance. This improved signal may be fed into a comparator, where the signal may be improved further using an equalizer. The use of negative capacitance circuit will increase the transmit and receive signaling quality of I/O interfaces.