I/O Power Line Layout for Low-Impedance System LSI

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Solution Overview

Problem

In system LSIs, the need for low impedance connections between I/O power sources and logic circuit sections results in wide power source lines, which are inefficient in terms of area usage, affecting the overall performance and size of the system.

Innovation Solution

The implementation of I/O power source lines within each I/O cell, allowing the I/O power consuming circuit to be connected directly to the I/O power source cell, reducing the need for wide power source lines and minimizing area overhead by keeping the connection lines short.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a wide power source line is drawn from the I/O power source cell to the logic circuit section to achieve low impedance connection, then the impedance is reduced, but the area occupied increases significantly

Engineering Contradiction:
Improveconnection impedanceVSAvoidpower source line area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent divides the power source line into two segments: a wide power source line within the I/O cell that supplies the I/O power source, and a narrow line extending from the I/O cell to the logic circuit section. This segmentation allows the high-current path to be localized to a small area while still providing low impedance where needed.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies different line widths to different locations based on local requirements. The I/O cell contains a wide power source line to handle the high current (10-20 mA) required for programming, while the extension to the logic circuit section uses a narrow line since it carries less current. This local quality approach optimizes both impedance and area usage.

Inventive Principle:
Principle #3Local quality

2Reliability

If the I/O power consuming circuit is connected directly to the I/O power source cell, then low impedance is achieved, but the layout complexity increases

Engineering Contradiction:
Improvepower source connection impedanceVSAvoidcircuit layout complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The I/O cell structure is designed to serve multiple functions: it contains the I/O power source cell, provides I/O functionality through its cells, and simultaneously acts as a power distribution point for the logic circuit section. The I/O power source line within the I/O cell serves both the I/O cells and extends to supply the logic circuit section, reducing the need for separate dedicated power lines.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS7884642B2System LSI
Publication Date: 2011.02.08 NUVOTON TECH CORP JAPAN
  • US7884642B2 patent drawing
  • US7884642B2 patent drawing
  • US7884642B2 patent drawing

AI summary

A system LSI includes an input/output section and a logic circuit section. The input/output section includes an I/O power source cell having a supply voltage higher than a power source for the logic circuit section and a plurality of I/O cells in each of which an I/O power source line is provided for supplying source power from the I/O power source cell. The logic circuit section includes an I/O power consuming circuit which uses the I/O power source cell as a power source. The I/O power consuming circuit is connected to a line leading from an I/O power source line in at least one of the plurality of I/O cells.