IO Sub-Bank Sharing for More External Memory Interfaces
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Solution Overview
Problem
Integrated circuits (ICs) are limited in the number of input/output (IO) banks due to size and floorplan constraints, restricting the number of external memory interfaces they can support, as each IO bank can only be part of one interface, leading to reduced flexibility and increased die size and cost.
Innovation Solution
Implementing IO banks with sub-banks that allow sharing between multiple external interfaces, enabling each sub-bank to support two or more different external interfaces, such as DDR4 and DDR5, thereby increasing the number of supported interfaces and reducing die size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If each IO bank is dedicated to only one external memory interface, then the interface can operate reliably with dedicated resources, but the number of supported external interfaces is limited and die size increases
Solution Approach 1:
The IO bank is designed to serve multiple external memory interfaces simultaneously by dividing its lanes into sub-banks. Each sub-bank can be independently configured and assigned to different interfaces, allowing a single IO bank to fulfill multiple functions and support multiple interfaces without requiring additional dedicated IO banks for each interface.
Solution Approach 2:
The IO bank is segmented into multiple sub-banks, where each sub-bank contains a subset of the IO lanes. This segmentation allows independent configuration and assignment of sub-banks to different external interfaces, enabling one IO bank to support multiple interfaces while maintaining dedicated resource allocation for each interface subset.
2Adaptability or versatility
If the number of IO banks is increased to support more external interfaces, then more interfaces can be supported, but the die size and cost increase
Solution Approach 1:
Instead of creating separate dedicated IO banks for each external memory interface, the invention makes existing IO banks universal by enabling them to serve multiple interfaces through sub-bank configuration. This reduces the total number of IO banks needed while increasing the number of supported interfaces, thereby reducing device complexity.
Solution Approach 2:
Multiple external memory interfaces are merged to share common IO bank resources through the sub-bank mechanism. Rather than having separate physical IO banks for each interface, the interfaces are combined to utilize the same physical resources with logical separation, reducing overall structural complexity.
3Area of stationary object
If IO banks are shared between multiple external interfaces, then die size is reduced, but power supply voltage management becomes more complex
Solution Approach 1:
The IO bank is segmented into sub-banks that can be independently powered. Each sub-bank can receive power from appropriate power domains, allowing flexible voltage management. This segmentation enables the shared IO bank to handle different power supply requirements of multiple interfaces while maintaining independent control over each sub-bank's power state.
Solution Approach 2:
The power supply configuration for shared IO banks is made dynamic rather than static. The system can adaptively assign power domains to different sub-banks based on which external interfaces are currently active, allowing the power management structure to change dynamically according to operational requirements rather than being fixed for the entire device.
Data Source
AI summary
An integrated circuit includes a first input/output lane comprising first external terminals and first driver circuits. The first driver circuits exchange signals with a first external device through the first external terminals as part of a first external interface. The first input/output lane is part of a sub-bank in an input/output bank that implements at least a part of the first external interface. The integrated circuit includes a second input/output lane comprising second external terminals and second driver circuits. The second driver circuits exchange signals with a second external device through the second external terminals as part of a second external interface. The second input/output lane is part of the sub-bank in the input/output bank that implements at least a part of the second external interface.


