Ion Implantation Defects for Resistive Memory Voltage Consistency
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional flash memory degrades with frequent reprogramming and operates too slowly for general use as random access memory, and alternative non-volatile memory devices with consistent characteristics are needed to address these issues.
Innovation Solution
A semiconductor device layer is fabricated using ion implantation to create controlled defects, which enhances the consistency and reliability of memory cells by tuning the concentration and distribution of defects, allowing for more predictable operation and reduced forming voltage requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional flash memory is used to achieve high density and low manufacturing cost, then memory density and cost are improved, but reliability degrades with frequent reprogramming and operating speed is too slow
Solution Approach 1:
The patent changes the fundamental operating parameter of the memory device by transitioning from charge-based storage (flash memory) to resistance-based storage (resistive memory). This parameter change enables the memory to withstand frequent reprogramming cycles without degradation, as the resistive switching mechanism does not suffer from the same wear-out mechanisms as flash memory tunnel oxides.
2Quantity of substance
If conventional flash memory is used to achieve high density, then storage capacity is improved, but operating speed becomes too slow for general RAM substitution
Solution Approach 1:
The patent replaces the charge trapping mechanism (which requires tunneling through oxide barriers and is inherently slow) with a resistive switching mechanism that occurs through formation and rupture of conductive filaments. This substitution of the underlying physical mechanism enables much faster switching speeds while maintaining high density capabilities.
3Speed
If alternative non-volatile memory devices are used to achieve faster operation, then operating speed is improved, but manufacturing consistency and reliability are unacceptable due to silicon processing variations
Solution Approach 1:
The patent applies local quality by creating a nitrogen-rich region specifically at the interface between the oxide layer and the electrode. This localized modification of the interface region provides consistent nucleation sites for conductive filament formation, thereby reducing the variation in forming voltage across different devices and manufacturing batches while enabling fast resistive switching.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method results in more reliable and efficient memory devices with lower forming voltage needs and improved set/reset voltage consistency, enhancing the yield and predictability of multistable resistive memory devices.
Implementation Method 1
A semiconductor device layer is fabricated using ion implantation to create controlled defects
Data Source
AI summary
This disclosure provides a method of fabricating a semiconductor device layer and associated memory cell structures. By performing a surface treatment process (such as ion bombardment) of a semiconductor device layer to create defects having a deliberate depth profile, one may create multistable memory cells having more consistent electrical parameters. For example, in a resistive-switching memory cell, one may obtain a tighter distribution of set and reset voltages and lower forming voltage, leading to improved device yield and reliability. In at least one embodiment, the depth profile is selected to modulate the type of defects and their influence on electrical properties of a bombarded metal oxide layer and to enhance uniform defect distribution.