Automated IP Tag Verification for SRAM Cell Layouts

Resolve Bottlenecks,
Find Innovative SolutionsGenerate Solutions

Solution Overview

Problem

Semiconductor manufacturing companies face challenges in scanning and verifying intellectual property (IP) tags within integrated circuit designs, particularly in SRAM layouts where duplicated sub-cells make it difficult to identify and verify IP tags, leading to time-consuming and inaccurate manual processes.

Innovation Solution

A system and method that embeds inert tags in the cell library data, allowing for automated scanning and verification of IP usage by comparing the customer's design against a 'golden bits' reference, identifying and highlighting differences, and generating reports for design revisions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If manual scanning and verification of IP tags is performed, then accuracy can be maintained, but time consumption increases significantly

Engineering Contradiction:

ImproveIP verification accuracyVSAvoidTime for manual scanning and verification

Core Design Contradiction:

Measurement precisionVSLoss of time

Solution Approach 1:

The patent replaces manual mechanical scanning and verification processes with an automated computer-based system. The system automatically scans layout files for IP tags, extracts cell data, compares against reference libraries, and generates verification reports without human intervention, thereby eliminating time consumption while maintaining accuracy through systematic automated comparison.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The verification system performs self-service by automatically scanning its own database for IP tags, extracting relevant cell information, comparing it against reference data, and generating verification results independently without requiring manual human analysis. This self-automated process eliminates the need for manual scanning while ensuring consistent and accurate verification.

Inventive Principle:

Principle #25Self-service

2Productivity

If automated scanning for IP tags is implemented, then time efficiency improves, but reliability decreases due to difficulty in scanning duplicated sub-cells

Engineering Contradiction:

ImproveSpeed of IP verificationVSAvoidAccuracy of IP tag scanning

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

The patent applies segmentation by dividing the large SRAM layout into smaller manageable units - individual cells and sub-cells - each marked with unique IP tags. The system scans and processes each segmented unit independently, allowing reliable identification of IP tags even when cells are duplicated. This segmentation enables the automated system to handle complex layouts with multiple identical cell structures without losing reliability.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The system implements local quality by assigning unique IP tags to specific instances of cells and sub-cells within the layout. Each duplicated cell or sub-cell receives distinct identification markers that allow the automated scanning system to differentiate between instances. This localized tagging approach ensures that automated scanning can reliably distinguish and verify each unique cell instance even within duplicated structures.

Inventive Principle:

Principle #3Local quality

3Reliability

If manual comparison of cell layouts is performed, then verification thoroughness is maintained, but productivity decreases

Engineering Contradiction:

ImproveThoroughness of verificationVSAvoidSpeed of verification process

Core Design Contradiction:

ReliabilityVSProductivity

Solution Approach 1:

The patent replaces manual mechanical comparison of cell layouts with an automated computer system that performs thorough verification through systematic data extraction, comparison against reference libraries, and automated report generation. The system processes entire layouts and individual cells automatically, maintaining verification thoroughness while dramatically increasing productivity by eliminating manual analysis time.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The system performs preliminary action by pre-processing and organizing reference cell data into searchable databases before actual verification occurs. The reference libraries are pre-organized with metadata and indexing structures that enable rapid automated comparison during verification. This preliminary preparation allows the system to perform thorough verification quickly without manual intervention, as the comparison logic is pre-established through automated algorithms.

Inventive Principle:

Principle #10Preliminary action

Data Source

PatentUS7788612B2System, method, and computer program product for matching cell layout of an integrated circuit design

Publication Date: 2010.08.31 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

A method and system for verifying an integrated circuit design are provided. The method includes identifying cell tags embedded in a proposed integrated circuit design file, comparing cells identified as having a tag embedded therein to a cell library containing verified cell data to determine differences between the identified tagged cells and corresponding verified cell data from the cell library, and revising the proposed integrated circuit design to correct differences between the proposed integrated circuit design file and the verified cell data.