IPS Array Substrate Staggered Electrodes and Half-Tone Mask
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Solution Overview
Problem
The existing in-plane switching (IPS) array substrate design limits the utilization of liquid crystals above the electrodes due to a parallel electric field, and the fringe field switching (FFS) mode, while improving efficiency, increases manufacturing costs with additional masks required.
Innovation Solution
A manufacturing method using a half-tone mask to form a common electrode within an insulation protection layer and a pixel electrode on its surface, allowing a longitudinal electric field component to be generated, thereby improving liquid crystal utilization and simplifying the manufacturing process by eliminating the need for an additional mask.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a traditional IPS array substrate design with pixel electrode and common electrode on the same plane is used, then the manufacturing process is simple, but the liquid crystal utilization efficiency is low
Solution Approach 1:
The patent positions the common electrode within the insulation protection layer (lower plane) and the pixel electrode on the upper surface of the insulation protection layer (upper plane), creating a staggered arrangement in the vertical dimension. This dimensional change enables the electric field to extend through the liquid crystal layer more effectively, improving liquid crystal utilization without complicating the manufacturing process
2Productivity
If a fringe field switching (FFS) mode with additional masks is used, then the liquid crystal utilization efficiency is improved, but the manufacturing cost increases
Solution Approach 1:
The patent merges the formation of the common electrode and pixel electrode into a single manufacturing step by depositing a conductive layer that simultaneously forms both electrodes. The half-tone mask is designed to create both electrode patterns in one exposure process, eliminating the need for additional masks required by traditional FFS modes
3Productivity
If a half-tone mask is used to form common electrode in insulation protection layer and pixel electrode on its surface, then the liquid crystal utilization efficiency is improved, but the manufacturing precision requirements increase
Solution Approach 1:
The insulation protection layer serves as an intermediary structure that separates and positions the common electrode (within the layer) and pixel electrode (on the surface). This intermediary layer provides a built-in reference structure that simplifies alignment during manufacturing, reducing the actual precision requirements despite the complex electrode arrangement
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method enhances liquid crystal utilization efficiency and light transmission rate while reducing manufacturing costs by allowing the liquid crystals to rotate horizontally and achieve a predetermined tilt angle, and simplifies the manufacturing process compared to traditional FFS array substrates.
Implementation Method 1
subjecting the insulation protection layer to etching with the photoresist layer as a shielding layer so as to form a common electrode channel in the insulation protection layer
Implementation Method 2
subjecting the photoresist layer to ashing treatment in order to thin the photoresist layer
Implementation Method 3
depositing a conductive layer on the remaining portion of the photoresist layer and the insulation protection layer
Data Source
AI summary
The present invention provides a manufacturing method of an IPS array substrate and an IPS array substrate. The manufacturing method of the IPS array substrate according to the present invention uses a half-tone mask to simultaneously form a common electrode and a pixel electrode that stagger in a longitudinal direction so that the common electrode is set inside a common electrode channel of an insulation protection layer while the pixel electrode is set on an upper surface of the insulation protection layer to provide an IPS array substrate, which, compared to a traditional IPS array substrate, allows the common electrode and the pixel electrode to generate therebetween a longitudinal component of an electric field whereby liquid crystal of a liquid crystal panel that is located above the pixel electrode can be driven and used, where the liquid crystal is allowed to rotate horizontally and also allowed to generate a predetermined longitudinal tilt angle the TFT substrate can be a TFT substrate provided for a traditional IPS array substrate, making it possible to save one mask and associated process, as compared to a traditional FFS array substrate, and thus saving manufacturing cost.