3D Memory Array With Isolated Bit Lines Reducing Leakage
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Solution Overview
Problem
Existing three-dimensional memory arrays face challenges in minimizing leakage currents and power consumption due to the inherent spreading of addressing signals across multiple memory elements, leading to inaccurate data reading and increased power requirements.
Innovation Solution
The implementation of a three-dimensional memory array architecture with vertically oriented select devices and bit lines, which includes isolation gaps between adjacent bit lines to prevent leakage currents, and the elimination of diodes connected in series with variable resistive elements, allowing for reduced power consumption and simplified manufacturing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-generated harmful factors
If diodes are connected in series with variable resistive elements to reduce leakage currents, then leakage current is reduced, but device complexity and manufacturing difficulty increase
Solution Approach 1:
The patent extracts and removes the diode component from the memory cell structure. By eliminating the series-connected diode and using a three-dimensional cross-point architecture with selective word line and bit line activation, the patent achieves leakage current reduction without requiring additional steering diodes, thereby reducing device complexity
Solution Approach 2:
The patent transitions from a two-dimensional memory architecture to a three-dimensional cross-point architecture. This dimensional change allows for selective activation of memory cells through coordinated word line and bit line voltage application, enabling leakage current control without additional components
2Productivity
If addressing voltages are applied to a large number of memory elements in parallel, then productivity increases, but power consumption increases
Solution Approach 1:
The patent applies local quality by using different voltage levels on different lines. Selected word lines receive high voltage (Vpp) while unselected word lines receive low voltage (Vss), and similarly for bit lines. This localized voltage differentiation enables parallel operation of multiple memory cells while limiting power consumption to only the selected cells
Solution Approach 2:
The patent segments the memory array into independently addressable blocks through the three-dimensional cross-point architecture. By dividing the memory space and using selective line activation, the system can operate on subsets of memory cells in parallel, improving productivity while controlling overall power consumption
3Ease of operation
If bit lines are continuously connected to global bit lines, then ease of operation improves, but leakage currents increase
Solution Approach 1:
The patent introduces dynamic control of bit line connections through locally connected bit line select switches. These switches dynamically connect or disconnect local bit lines from global bit lines based on selection signals, enabling leakage current prevention while maintaining operational simplicity through automated switch control
Data Source
AI summary
A non-volatile data storage device comprises pairs of immediately adjacent and isolated-from-one-another local bit lines that are independently driven by respective and vertically oriented bit line selector devices. The isolation between the immediately adjacent and isolated-from-one-another local bit lines also isolates from one another respective memory cells of the non-volatile data storage device such that leakage currents cannot flow from memory cells connected to a first of the immediately adjacent and isolated-from-one-another local bit lines to memory cells connected to the second of the pair of immediately adjacent and isolated-from-one-another local bit lines. A method programming a desire one of the memory cells includes applying boosting voltages to word lines adjacent to the bit line of the desired memory cell while not applying boosting voltages to word lines adjacent to the other bit line of the pair.