Isolated Semiconductor Region Layout for Higher Breakdown Voltage
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Solution Overview
Problem
Existing semiconductor devices integrated in a common substrate face challenges in electrical isolation and breakdown voltage, particularly when multiple devices are integrated, leading to inefficiencies and potential premature breakdown.
Innovation Solution
A semiconductor device with a buried layer and elongate sinkers of opposing conductivity type, strategically positioned and doped to enhance electrical isolation and breakdown voltage, utilizing masks with specific openings for implantation and outdiffusion to optimize contact resistance and breakdown voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple semiconductor devices are integrated within a common semiconductor substrate, then device integration density is improved, but electrical isolation between devices becomes more difficult to achieve
Solution Approach 1:
The semiconductor substrate is segmented into multiple isolated device regions through the formation of deep isolation trenches filled with electrically insulating material. These trenches physically divide the substrate into separate regions, allowing multiple devices to be integrated while maintaining electrical isolation between them. The isolation trenches extend through the entire substrate thickness, creating distinct electrical zones for each device.
Solution Approach 2:
An intermediate layer of electrically insulating material is introduced between adjacent semiconductor devices to prevent electrical interaction. This intermediary isolation layer acts as a barrier that blocks current flow between devices while allowing both devices to function independently on the same substrate, thus enabling high integration density without compromising electrical isolation.
2Reliability
If isolation structures are made deeper to improve electrical isolation, then isolation strength is improved, but manufacturing complexity and cost increase
Solution Approach 1:
The formation of isolation trenches is merged with other substrate preparation steps in the manufacturing process. The trench etching, filling, and planarization are combined into an integrated process sequence that leverages existing manufacturing capabilities, thereby achieving deep isolation structures without proportionally increasing manufacturing complexity or cost.
Solution Approach 2:
The depth and dimensions of isolation trenches are optimized within the capabilities of standard manufacturing equipment. By carefully selecting trench depth parameters that achieve sufficient electrical isolation while remaining within the processing limits of conventional fabrication tools, the patent achieves strong isolation without requiring exotic or overly complex manufacturing processes.
3Reliability
If doping concentration in isolation structures is increased to improve breakdown voltage, then breakdown voltage is improved, but contact resistance may increase
Solution Approach 1:
The isolation structure employs non-uniform doping concentration distributed in specific zones. Regions requiring high breakdown voltage (such as the bulk isolation material) are heavily doped, while regions requiring low contact resistance (such as interfaces with active devices) are lightly doped or undoped. This spatial variation in doping quality allows simultaneous optimization of both breakdown voltage and contact resistance in different locations of the isolation structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively improves electrical isolation and breakdown voltage, enabling the semiconductor device to operate at higher voltages with enhanced reliability and efficiency by optimizing the doping profiles and sinker positions.
Implementation Method 1
masks having an open area through which the dopants are implanted into the semiconductor substrate
Implementation Method 2
utilizing masks with specific openings for implantation and outdiffusion to optimize contact resistance and breakdown voltage
Data Source
AI summary
A semiconductor device includes a semiconductor substrate of a first conductivity type which has a first surface. A first device region formed in the semiconductor substrate has the first conductivity type and a lateral extent that is less than the lateral extent of the first surface of the semiconductor substrate. The first device region is electrically separated from the semiconductor substrate by an isolation structure. The isolation structure includes a buried layer which is doped with a second conductivity type that opposes the first conductivity type and further includes a first elongate sinker of the second conductivity type. The first elongate sinker extends from the first surface into the semiconductor substrate and is in electrical contact with the buried layer. The semiconductor device further includes a breakdown voltage influencing structure of the second conductivity type that is arranged in the semiconductor substrate and laterally adjacent the buried layer.