Isolation Regions Void-Free Filling
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Solution Overview
Problem
The challenge in semiconductor fabrication is filling large-aspect-ratio isolation trenches in integrated circuit devices without forming voids, particularly in memory device fabrication where reduced spacing between components exacerbates void formation during the filling process.
Innovation Solution
A method involving the use of high-density plasma (HDP) oxides and a steam-densification process to form a dense dielectric plug within the trenches, followed by chemical mechanical planarization and nitrogen annealing to create a high-density transition region, ensuring effective filling and electrical isolation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If isolation trenches are filled using chemical vapor deposition with high-density plasma oxides, then electrical isolation between components is achieved, but voids form within the dielectric due to large aspect ratios
Solution Approach 1:
A liner layer is deposited on the trench walls before filling the trench with dielectric material. This preliminary action modifies the trench surface properties, enabling better dielectric deposition and preventing void formation during the filling process, thereby achieving complete trench filling without compromising electrical isolation
Solution Approach 2:
The aspect ratio of the isolation trench is reduced by adjusting trench dimensions or filling depth. By changing the geometric parameters of the trench structure, the filling process can proceed without void formation while maintaining the required electrical isolation between components
2Area of moving object
If spacing between memory cell columns is reduced to make memory devices smaller, then device size is reduced, but void formation in isolation trenches is exacerbated
Solution Approach 1:
A liner layer is formed on the trench walls before dielectric filling. This preliminary preparation enables successful filling of narrower trenches with reduced spacing, preventing void formation even when column spacing is minimized to reduce overall memory device size
Solution Approach 2:
The liner layer is nested within the isolation trench structure, forming a multi-layer configuration where the liner is embedded in the trench walls. This nested structure enables the trench to be filled completely without voids, allowing reduced spacing between memory cell columns
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach prevents void formation and ensures reliable electrical isolation between memory cells, enhancing the performance and reliability of memory devices by maintaining a high-density dielectric structure that supports the structural integrity and functionality of the memory array.
Implementation Method 1
filled using a chemical vapor deposition process, e.g., with high-density plasma (HDP) oxides
Implementation Method 2
a steam-densification process to form a dense dielectric plug within the trenches
Implementation Method 3
nitrogen annealing to create a high-density transition region
Data Source
AI summary
Methods and apparatus are provided. An isolation region is formed by lining a trench formed in a substrate with a first dielectric layer by forming the first dielectric layer adjoining exposed substrate surfaces within the trench using a high-density plasma process, forming a layer of spin-on dielectric material on the first dielectric layer so as to fill a remaining portion of the trench, and densifying the layer of spin-on dielectric material.