Isolation Structure Segmentation For Semiconductor Leakage Control

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Multi-bridge-channel (MBC) transistors suffer from current leakage due to dopant diffusion and inadequate gate control over the bottommost channel member, leading to poor device performance, especially as device spacing decreases.

Innovation Solution

The implementation of semiconductor devices with specific isolation structures, including smiling regions of varying heights between n-type and p-type regions, to reduce dopant diffusion and enhance gate control, thereby minimizing current leakage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If device spacing is decreased to increase functional density, then productivity and production efficiency are improved, but current leakage increases due to dopant diffusion and inadequate gate control

Engineering Contradiction:
Improveproduction efficiencyVSAvoiddevice performance
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The isolation structure is segmented into multiple regions with different heights: a first region with height H1 and a second region with height H2, where H1 > H2. This segmentation allows the taller first region to provide enhanced dopant diffusion barrier for n-type devices while the shorter second region provides adequate barrier for p-type devices, resolving the contradiction between reduced device spacing and current leakage prevention.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the isolation structure are assigned different heights tailored to specific device types. The first region (height H1) is positioned to serve n-type devices that require higher isolation, while the second region (height H2) serves p-type devices. This local differentiation optimizes dopant diffusion prevention for each device type without requiring uniform increase in isolation height across all devices, thus maintaining productivity while improving reliability.

Inventive Principle:
Principle #3Local quality

2Reliability

If isolation structure height is increased to prevent dopant diffusion, then current leakage is reduced, but device complexity and manufacturing complexity increase

Engineering Contradiction:
Improvecurrent leakage preventionVSAvoidisolation structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The isolation structure is divided into two height regions (H1 and H2) that can be formed through selective etching processes. This segmentation achieves differentiated isolation heights without requiring completely separate formation processes for each region, thereby reducing manufacturing complexity compared to forming entirely separate isolation structures for different device types.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The isolation structure utilizes vertical dimensionality with two distinct height levels (H1 and H2) to provide differentiated isolation for different device types. This vertical differentiation allows complex functional requirements to be met while maintaining a relatively simple planar footprint, reducing overall device complexity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Ease of manufacture

If uniform isolation structure is used for all devices, then manufacturing process is simplified, but gate control over bottommost channel member is inadequate leading to current leakage

Engineering Contradiction:
Improveisolation structure fabricationVSAvoidgate control
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The isolation structure is formed with differentiated heights (H1 and H2) before gate structure formation. This preliminary differentiation of isolation heights allows subsequent gate structures to be formed with appropriate control over bottommost channel members, preventing current leakage while maintaining relatively simple manufacturing by avoiding post-gate modifications.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The solution transitions from uniform planar isolation to vertical multi-level isolation with heights H1 and H2. This vertical dimensionality provides enhanced gate control capability without complicating the planar layout or requiring complex multi-step gate formation processes, thus maintaining ease of manufacture while improving reliability.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS20230019386A1Isolation Features For Semiconductor Devices And Methods Of Fabricating The Same
Publication Date: 2023.01.19 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20230019386A1 patent drawing
  • US20230019386A1 patent drawing
  • US20230019386A1 patent drawing

AI summary

Semiconductor devices and methods are provided. In an embodiment, a semiconductor device includes first nanostructures directly over a first portion of a substrate and second nanostructures directly over a second portion of the substrate, n-type source/drain features coupled to the first nanostructures and p-type source/drain features coupled to the second nanostructures, and an isolation structure disposed between the first portion of the substrate and the second portion of the substrate. The isolation structure includes a first smiling region in direct contact with the first portion of the substrate and having a first height. The isolation structure also includes a second smiling region in direct contact with the second portion of the substrate and having a second height, the first height is greater than the second height.