Isolation Trench Dielectric Structure for Gate Leakage Control

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Solution Overview

Problem

In multi-gate field-effect transistors, such as gate-all-around FETs, the high aspect ratio of isolation trenches leads to challenges in forming seal-free dielectric layers, resulting in undesired leakage between adjacent gate structures due to voids or seals at the trench openings during the formation of etch-stop and dielectric layers.

Innovation Solution

A method involving nitridation with selective formation of a dielectric layer, using plasma nitridation techniques like MW or ICP, to create a thicker layer at the trench bottom than on the sidewalls, reducing the aspect ratio and minimizing voids or seals, thereby enhancing the formation of isolation structures within high-aspect-ratio trenches.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional dielectric layer formation methods are used in high aspect ratio isolation trenches, then the isolation structures can be formed, but voids or seals occur at the trench openings leading to electrical leakage

Engineering Contradiction:
Improveelectrical separationVSAvoiddielectric layer formation
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

A mandrel layer is formed at the bottom of the isolation trench before forming the dielectric layer. This preliminary structure serves as a foundation that prevents void formation and enables complete filling of the high aspect ratio trench, ensuring reliable electrical separation without manufacturing defects

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The mandrel layer acts as an intermediary element between the trench bottom and the dielectric layer. It facilitates the formation process by providing a structural base that eliminates the harmful effects of voids and seals, enabling successful dielectric layer deposition in high aspect ratio trenches

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of manufacture

If the aspect ratio of isolation trenches is reduced, then dielectric layer formation becomes easier, but device density and performance improvement is limited

Engineering Contradiction:
Improvedielectric layer formationVSAvoiddevice density
Core Design Contradiction:
Ease of manufactureVSProductivity

Solution Approach 1:

The mandrel layer is formed in advance at the trench bottom, enabling subsequent dielectric layer formation in high aspect ratio trenches without requiring aspect ratio reduction. This allows maintaining small trench dimensions for high device density while ensuring manufacturability through the preliminary structural support

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The introduction of the mandrel layer changes the structural parameters of the trench system, transforming it from a simple void to a supported structure. This enables the trench to maintain high aspect ratio (small width for high density) while the mandrel provides the mechanical support needed for successful dielectric filling

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively reduces the aspect ratio of isolation trenches, preventing voids and seals, thus improving the electrical separation between gate structures and reducing leakage, facilitating better semiconductor manufacturing processes, especially in advanced technology nodes.

Implementation Method 1

A method involving nitridation with selective formation of a dielectric layer, using plasma nitridation techniques like MW or ICP

Methodology Applied
Scientific EffectPlasma nitridation: Plasma Enhanced Chemical Vapour Deposition

Data Source

PatentUS20240371961A1Semiconductor structure and method of manufacturing the same
Publication Date: 2024.11.07 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20240371961A1 patent drawing
  • US20240371961A1 patent drawing
  • US20240371961A1 patent drawing

AI summary

A semiconductor structure includes a semiconductor substrate and an isolation structure disposed in the semiconductor substrate, wherein the isolation structure includes a first dielectric layer in contact with the semiconductor substrate and a second dielectric layer over the first dielectric layer, wherein the first dielectric layer is between the second dielectric layer and the semiconductor substrate, the first dielectric layer comprises a bottom portion and a sidewall portion, and a thickness of the bottom portion is greater than a thickness of the sidewall portion, wherein the first dielectric layer and the second dielectric layer comprise different materials, and wherein the first dielectric layer comprises a nitride of a semiconductor material.