Magnetic Josephson Junction Memory for Zero-Static-Power Switching
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Solution Overview
Problem
CMOS-based memory technologies face limitations in device size and high power consumption due to leakage current, even when circuits are inactive, leading to inefficient energy usage in devices like servers in data centers.
Innovation Solution
A superconducting logic-based memory system utilizing a magnetic Josephson junction (MJJ) coupled with an inductor to form a loop, where the MJJ switches states based on current flow, exerting torque on the magnetization of the free magnetic layer, allowing for low-power operation through AC power and zero static power dissipation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If CMOS technology is used for memory, then device integration is achieved, but power consumption increases due to leakage current
Solution Approach 1:
The patent transitions from CMOS technology operating at room temperature to superconducting technology operating at cryogenic temperatures. This parameter change (temperature) fundamentally alters the electrical properties of the materials, enabling zero-resistance current flow and eliminating leakage current while maintaining device functionality. The superconducting state is achieved by cooling the system below the critical temperature of the superconducting materials used in the Josephson junctions and inductors.
2Reliability
If CMOS transistors maintain state, then data storage is achieved, but static power dissipation occurs
Solution Approach 1:
The patent replaces the CMOS transistor-based storage mechanism with a superconducting quantum interference device (SQUID) based on Josephson junctions. Instead of using electric fields and charge storage in transistors, the system uses quantum mechanical effects (Josephson effect) and magnetic flux quantization to store and read data. The superconducting loop with Josephson junctions creates a bistable system where data is stored as magnetic flux states, eliminating the need for continuous power supply to maintain transistor states.
3Area of moving object
If device size is reduced in CMOS, then integration density increases, but leakage current increases
Solution Approach 1:
The patent changes the operating temperature parameter to cryogenic levels, which fundamentally alters the electrical behavior of the materials. At these temperatures, the superconducting materials exhibit zero electrical resistance, completely eliminating leakage current regardless of device dimensions. This allows for reduced device size and increased integration density without the penalty of increased leakage that plagues scaled CMOS devices.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables low-power operation and efficient energy usage by switching memory states using Josephson phase-dependent torque, reducing power consumption and maintaining data integrity without static power dissipation.
Implementation Method 1
a magnetic Josephson junction (MJJ) coupled to the first inductor to form a loop... the current flowing through the MJJ is configured to exert a torque on the magnetization of the free magnetic layer to cause the switch from the first state of the memory cell to the second state
Data Source
AI summary
Examples described in this disclosure relate to a memory cell with Josephson phase-based torque. In one example, a memory cell including a first inductor and a magnetic Josephson junction (MJJ) coupled to the first inductor to form a loop is provided. The MJJ may include a free magnetic layer formed above a non-magnetic layer, and a fixed magnetic layer below the non-magnetic layer. A first state of the memory cell corresponds to a first magnetization of the free magnetic layer that is parallel to a magnetization of the fixed magnetic layer and the second state of the memory cell corresponds to a second magnetization of the free magnetic layer that is anti-parallel to the magnetization of the fixed magnetic layer. The memory cell is configured to switch from the first state to the second state based on whether the MJJ is in a zero-state or a π-state.