Junction-less Gate-controlled Voltage Clamp for IC Protection
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Solution Overview
Problem
Existing protection devices for integrated circuits are inadequate in responding to various undesirable power conditions such as current in-rush and current surges, leading to insufficient protection and the need for larger components to compensate, which is inefficient.
Innovation Solution
A junction-less, gate-controlled voltage clamp device with a gate terminal coupled to a voltage reference device, providing ultra-low dropout regulation, fast response time, and ability to manage both current and voltage spikes without the need for output capacitance or noise generation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional protection devices are used for integrated circuits, then basic overvoltage protection is provided, but the devices fail to respond adequately to current in-rush and current surge conditions
Solution Approach 1:
The protection function is divided into two distinct devices: a junction-less voltage clamp device for fast response to current in-rush and surge conditions, and a traditional LDO regulator for steady-state voltage regulation. This segmentation allows each device to be optimized for its specific function, with the voltage clamp providing immediate protection during transient events while the LDO maintains precise voltage levels during normal operation.
Solution Approach 2:
The voltage clamp device is designed to handle multiple types of undesirable power conditions including current in-rush, current surges, and overvoltage events through its fast-acting current limiting capability. The gate-controlled mechanism provides universal protection across various transient conditions that a single traditional protection device could not address effectively.
2Reliability
If component size is increased to compensate for protection device inadequacies, then protection coverage is improved, but device area and complexity increase
Solution Approach 1:
By segmenting the protection function into a compact voltage clamp device and a standard LDO regulator, the solution avoids the need to oversized either component. The voltage clamp uses a small junction-less transistor structure optimized for fast transient response, while the LDO can be a standard-size regulator, together providing comprehensive protection without excessive area.
Solution Approach 2:
The voltage clamp device changes the operating parameters by using a junction-less transistor with gate control, enabling ultra-fast response times (nanosecond range) and ultra-low dropout voltage operation. This allows effective protection with minimal component size compared to traditional approaches that would require larger components to achieve the same protection level.
3Measurement precision
If traditional LDO regulators are used for voltage regulation, then steady-state voltage control is achieved, but response time to transient conditions is slow
Solution Approach 1:
The voltage clamp device is positioned in parallel with the LDO regulator and is pre-configured to activate immediately during transient events. The gate-controlled junction-less transistor is ready to clamp voltage spikes and limit current in-rush before the LDO's feedback loop can respond, providing preliminary protection action during the critical nanosecond-to-microsecond transient period.
Solution Approach 2:
The protection and regulation functions are segmented into two devices operating in different time domains: the voltage clamp handles nanosecond-to-microsecond transients with ultra-fast response, while the LDO handles microsecond-to-millisecond steady-state regulation. This temporal segmentation resolves the contradiction between fast transient response and precise steady-state control.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The voltage clamp device effectively protects integrated circuits from fast voltage and current increases, offering tight voltage regulation and fast current limiting, outperforming traditional LDOs in response time and stability while maintaining low overhead and noiselessness.
Implementation Method 1
a first field effect transistor can be included in the voltage clamp device
Data Source
AI summary
In one general aspect, an apparatus can include a junction-less, gate-controlled voltage clamp device having a gate terminal coupled to a voltage reference device.