Kill Die Subroutine for Semiconductor Parametric Failure Detection
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Solution Overview
Problem
The existing final package testing of semiconductor IC die is costly and inefficient due to high equipment costs and low Overall Equipment Efficiency (OEE), with streamlined test routines failing to detect parametric failures that occur between wafer probe and final test, leading to potential product quality issues.
Innovation Solution
A kill die subroutine is introduced into the probe program to transform parametric failures into continuity failures, allowing a streamlined final test routine to detect these issues, which includes minimal DC parametric tests and no AC parametric tests, ensuring all parametric rejects are identified and preventing escapes through the use of a guardband to account for assembly shifts.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If a streamlined final test routine with reduced parametric tests is used, then final test cost is reduced, but parametric failures are not detected leading to quality issues
Solution Approach 1:
The kill die subroutine is executed during the probe test stage before final packaging, transforming parametric failures into continuity failures. This preliminary action ensures that defective die are identified and marked early in the process, preventing them from reaching final test while allowing a streamlined final test routine to be used.
Solution Approach 2:
The kill die subroutine acts as an intermediary mechanism between probe testing and final testing. It transforms the nature of failures (from parametric to continuity) in a way that makes them detectable by the streamlined final test routine, which otherwise would not be capable of detecting parametric failures.
2Reliability
If full probe test coverage with extensive parametric tests is performed, then product quality is maintained, but final test cost remains high due to low OEE
Solution Approach 1:
By executing the kill die subroutine during probe testing, the system performs preliminary damage to parametric-failing die, converting their failure mode to continuity failures. This allows the system to maintain quality through comprehensive probe testing while enabling a more efficient streamlined final test routine.
3Measurement precision
If parametric limits at probe are set to match final test limits, then false rejects are reduced, but assembly shifts cause test escapes
Solution Approach 1:
The kill die subroutine applies preliminary damage to die that fail parametric tests, counteracting the potential for assembly shifts to cause test escapes. By transforming the failure mode before packaging, the system ensures that even if parametric limits are matched between probe and final test, the defective die will still be detected as continuity failures.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The kill die approach ensures all parametric rejects are captured, reducing final test costs and improving OEE from 30-40% to 60% by transforming parametric failures into detectable continuity failures, thereby enhancing product quality and reducing test time to about 50 ms.
Implementation Method 1
One typical method to generate kill die is to apply both high voltage and high current (high power) that exceeds the absolute ratings of the device to result in permanent damage to the device
Implementation Method 2
The kill die subroutine can invoke high electrical power across selected device pad/terminal combinations to intentionally damage an ESD diode
Data Source
AI summary
A method of testing semiconductor devices includes contacting bond pads coupled to integrated circuitry on a first die of a plurality of interconnected die on a substrate using a probe system having probes and probe tests including parametric tests, continuity tests, and a kill die subroutine. Probe tests using the probe program are performed. Die are binned into a first bin (Bin 1 die) for being a good die for all probe tests, or a second bin (Bin 2 die) for failing at least one of continuity tests and parametric tests. The Bin 2 die are divided into a first sub-group that failed the continuity tests and a second sub-group that do not fail the continuity tests. A kill die subroutine is triggered including applying power sufficient to selectively cause damage to the second sub-group of Bin 2 die to generate a continuity failure and thus generate kill die.