L-Shaped Spacer for Flash Memory Corner Thinning
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Solution Overview
Problem
Conventional shallow trench isolation technologies in flash memories lead to a corner thinning effect in the tunnel insulating layer, resulting in a low coupling ratio, which causes reliability issues and reduces the speed and reliability of read/write operations.
Innovation Solution
A semiconductor device with an L-shape spacer is manufactured by forming a composite spacer comprising a first insulating spacer and an L-shape second insulating spacer, which is integrated into the shallow trench isolation structure to prevent corner thinning and enhance the coupling ratio.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional spacer is formed from the insulating layer on the edge of the active area and at the side of the shallow trench isolation structure to reduce corner thinning, then the corner thinning effect is reduced, but the area of the tunnel under the floating gate is reduced, thus reducing the channel current and slowing down the read/write speed
Solution Approach 1:
The spacer is divided into two distinct segments: a first insulating spacer made from the original insulating layer, and a second insulating spacer formed from an additional insulating layer deposited thereon. This segmentation allows each part to serve different functions - the first spacer provides structural support while the second spacer prevents corner thinning, thereby maintaining both tunnel area and coupling ratio without compromising read/write speed
Solution Approach 2:
The invention transitions from a conventional single-layer spacer to a two-layer composite spacer structure. By adding the second insulating layer on top of the first insulating spacer, the solution addresses the corner thinning problem in a new dimensional approach that does not encroach upon the tunnel area under the floating gate, thus preserving channel current and read/write performance
2Productivity
If the coupling ratio is increased to improve read/write speed, then the electron transporting rate increases, but the corner thinning effect worsens, lowering reliability
Solution Approach 1:
The second insulating spacer is specifically positioned at the corner region where thinning occurs, providing localized reinforcement to the tunnel insulating layer. This local quality enhancement prevents corner thinning without affecting the overall tunnel area under the floating gate, allowing high coupling ratio and fast read/write speed to be achieved while maintaining reliability
Data Source
AI summary
A semiconductor device with an L-shape spacer and the method for manufacturing the same are provided. The semiconductor device comprises a substrate, a composite spacer, and a tunnel insulating layer. The substrate comprises a shallow trench isolation structure and a neighboring active area. The composite spacer is formed on the sidewall of the shallow trench isolation structure, and further comprises a first insulating layer and an L-shape second insulating layer spacer, wherein the first insulating layer is located between the L-shape second insulating layer spacer and the substrate. The tunnel insulating layer is located on the substrate of the active area and connects to the first insulating layer of the composite spacer on its corresponding side.