L1 Cache Deferral Mechanism for Shared Memory Arbitration

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Solution Overview

Problem

Current data processing systems face challenges in efficiently managing memory spaces with different scopes for multiple parallel threads, leading to increased dedicated storage requirements and performance bottlenecks.

Innovation Solution

Implementing a Level 1 (L1) cache that arbitrates between clients with diverse latency and bandwidth requirements, deferring requests when necessary and replaying them at a later time to reduce the need for dedicated storage like buffers and FIFOs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If dedicated storage (buffers, caches, FIFOs) is provided for each client, then each client can access memory independently without arbitration, but the total storage requirement increases significantly

Engineering Contradiction:
Improveclient access speedVSAvoiddedicated storage requirement
Core Design Contradiction:
ProductivityVSQuantity of substance

Solution Approach 1:

The patent merges multiple dedicated storage resources (L1 cache, L2 cache, buffers, FIFOs) into a unified storage hierarchy that serves multiple clients. The L1 cache is shared among multiple clients with different scopes (per-thread private, per-group shared, per-application global), eliminating the need for separate dedicated storage for each client while maintaining independent access capabilities through arbitration mechanisms.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The unified storage hierarchy is designed to serve multiple functions and multiple clients simultaneously. The L1 cache can function as private cache for individual threads, shared cache for thread groups, or global cache for entire applications, depending on the scope configuration. This multi-functionality reduces the total storage requirement while maintaining the performance benefits of dedicated storage for each access pattern.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Quantity of substance

If a shared L1 cache arbitrates between multiple clients, then dedicated storage can be reduced, but request processing latency increases due to arbitration and deferral

Engineering Contradiction:
Improvededicated storage requirementVSAvoidrequest processing latency
Core Design Contradiction:
Quantity of substanceVSLoss of time

Solution Approach 1:

The patent implements a deferral mechanism where requests that cannot be immediately serviced are deferred to a later time slot rather than being immediately rejected or causing the client to stall. The L1 cache identifies deferred requests, stores them in a deferral buffer, and schedules them for replay when resources become available. This preliminary deferral action prevents immediate latency penalties while maintaining progress in the system.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system implements feedback loops where the L1 cache monitors its utilization and arbitration state, and provides feedback to clients about request status (accepted, deferred, or stalled). When requests are deferred, the system tracks them and provides feedback for replay, ensuring that clients can resume execution once resources are available. This feedback mechanism optimizes latency by avoiding unnecessary stalling and enabling efficient resource utilization.

Inventive Principle:
Principle #23Feedback

3Quantity of substance

If requests are deferred and replayed, then storage requirements are reduced, but the complexity of request management increases

Engineering Contradiction:
Improvededicated storage requirementVSAvoidrequest management complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent introduces intermediary components (arbitration logic, deferral buffers, replay mechanisms) that mediate between clients and the shared L1 cache. These intermediaries handle the complexity of request management, arbitration, and deferral automatically, shielding clients from the underlying complexity. The arbitration logic acts as a mediator that公平ly distributes access to the shared cache among multiple clients with different scopes and requirements.

Inventive Principle:
Principle #24Intermediary (Mediator)

4Quantity of substance

If multiple parallel threads share memory spaces, then storage efficiency improves, but arbitration between threads with different latency requirements becomes more difficult

Engineering Contradiction:
Improvestorage efficiencyVSAvoidarbitration scheme complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent implements local quality by providing different cache scopes (per-thread private L1, per-group shared L1, per-application global L1) tailored to the specific access patterns and latency requirements of different thread groups. This allows threads with similar latency requirements to share cache resources efficiently while threads with different requirements can be isolated in separate cache hierarchies, simplifying arbitration by grouping clients with similar characteristics.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS8266383B1Cache miss processing using a defer/replay mechanism
Publication Date: 2012.09.11 NVIDIA CORP
  • US8266383B1 patent drawing
  • US8266383B1 patent drawing
  • US8266383B1 patent drawing

AI summary

One embodiment of the present invention sets forth a technique for processing cache misses resulting from a request received from one of the multiple clients of an L1 cache. The L1 cache services multiple clients with diverse latency and bandwidth requirements, including at least one client whose requests cannot be stalled. The L1 cache includes storage to buffer pending requests for caches misses. When an entry is available to store a pending request, a request causing a cache miss is accepted. When the data for a read request becomes available, the cache instructs the client to resubmit the read request to receive the data. When an entry is not available to store a pending request, a request causing a cache miss is deferred and the cache provides the client with status information that is used to determine when the request should be resubmitted.