Laminated Solid-State Imaging Element Thinned Substrate Well Region Protection

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Solution Overview

Problem

When semiconductor substrates are thinned, the well region's electrical characteristics deteriorate due to depletion layer issues, leading to leakage current and reduced inter-well withstand voltage.

Innovation Solution

A solid-state imaging element is designed with laminated semiconductor substrates, where at least one substrate is thinned, and an impurity region with the same carrier type as the thinned substrate is formed between the well region and the thinned surface, preventing the depletion layer from reaching the interface.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If semiconductor substrates are thinned to reduce total thickness and facilitate through-via formation, then device integration and manufacturing ease are improved, but electrical characteristics of well regions deteriorate due to depletion layer extension to the thinned interface

Engineering Contradiction:
Improvetotal thicknessVSAvoidelectrical characteristics of well region
Core Design Contradiction:
Volume of moving objectVSReliability

Solution Approach 1:

A buffer region is introduced as an intermediary layer between the well region and the thinned surface portion. This buffer region acts as a mediator that prevents the depletion layer from the well region from extending to the thinned interface, thereby protecting the electrical characteristics while maintaining the thinned structure. The buffer region is formed with a specific impurity concentration lower than the well region but higher than the substrate, creating a gradual transition that stops depletion layer propagation.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The impurity concentration parameter is strategically varied across different regions. The buffer region is formed with an impurity concentration that is lower than the well region (to allow depletion layer formation within the buffer) but higher than the substrate (to prevent depletion layer from reaching the thinned interface). This parameter gradient effectively controls the depletion layer extent while maintaining structural integrity.

Inventive Principle:
Principle #35Parameter changes

2Loss of energy

If semiconductor substrates are thinned, then chip area and power consumption are reduced, but leakage current increases due to defect levels at the thinned interface

Engineering Contradiction:
Improvepower consumptionVSAvoidleakage current
Core Design Contradiction:
Loss of energyVSObject-generated harmful factors

Solution Approach 1:

The buffer region serves as a protective intermediary between the active well region and the defective thinned interface. By positioning this buffer zone with controlled impurity concentration, it absorbs and terminates the depletion layer before it can reach defect levels at the thinned surface, thereby preventing leakage current paths while maintaining the low-power thinned structure.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Ease of manufacture

If semiconductor substrates are thinned, then manufacturing process simplicity is improved, but inter-well withstand voltage decreases due to depletion layer effects

Engineering Contradiction:
Improvethrough-via formation easeVSAvoidinter-well withstand voltage
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The impurity concentration parameter is precisely controlled in the buffer region to create an optimal gradient. This parameter change ensures that the depletion layer can form within the buffer region (maintaining manufacturing simplicity) while its extension is naturally limited before reaching the thinned interface (preserving inter-well withstand voltage characteristics).

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution effectively restrains the deterioration of electrical characteristics in the well region, reducing leakage current and maintaining inter-well withstand voltage.

Implementation Method 1

When the depletion layer reaches a thinned interface portion, the electrical characteristics of the well region are deteriorated

Methodology Applied
Scientific EffectDepletion layer:

Implementation Method 2

a leakage current caused to flow via defect levels

Methodology Applied
Scientific EffectLeakage current:

Data Source

PatentUS11715751B2Solid-state imaging element, electronic apparatus, and semiconductor device
Publication Date: 2023.08.01 SONY SEMICON SOLUTIONS CORP
  • US11715751B2 patent drawing
  • US11715751B2 patent drawing
  • US11715751B2 patent drawing

AI summary

The present technology relates a solid-state imaging element, an electronic apparatus, and a semiconductor device each of which enables deterioration of electrical characteristics in a well region of a semiconductor element formed in a thinned semiconductor substrate to be restrained. A solid-state imaging element as a first aspect of the present technology is a solid-state imaging element constituted by laminating semiconductor substrates in three or more layers, in which of the laminated semiconductor substrates, at least one sheet of the semiconductor substrate is thinned, and an impurity region whose carrier type is the same as that of the thinned semiconductor substrate is formed between a well region and a thinned surface portion in the thinned semiconductor substrate. The present technology can, for example, be applied to a CMOS image sensor.