Laminated Interconnect Circuits for High-Current Thermal Management
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Solution Overview
Problem
Conventional electrical interconnects, such as printed circuit boards and wire harnesses, are limited in functionality, material choices, and thermal management, making it difficult to achieve complex patterns, efficient heat transfer, and low weight for high electrical current applications.
Innovation Solution
The method involves laminating a substrate to a conductive layer, patterning it using techniques like chemical etching or laser ablation, and then applying a permanent insulator to support the patterned conductive portions, allowing for new materials and features, including thermal and electrical coupling through insulator openings.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional PCB fabrication with chemical etching is used, then conductive traces can be formed, but the dielectric base material choices are limited due to chemical resistance requirements
Solution Approach 1:
The patent separates the dielectric base layer from the conductive trace formation process. The dielectric base is formed first, then a conductive layer is applied and patterned separately. This segmentation allows independent material selection for each layer, enabling the use of non-chemically-resistant dielectric materials like certain polymers or composites that would otherwise be incompatible with chemical etching processes.
Solution Approach 2:
The patent introduces a conductive layer as an intermediary between the dielectric base and the final conductive trace structure. This conductive layer serves as the actual etching target, while the dielectric base remains protected and does not need to withstand chemical etchants. The intermediary conductive layer enables the use of diverse dielectric materials that lack chemical resistance.
2Ease of operation
If wire harnesses are used for electrical connections, then flexibility is achieved, but the structure becomes thick and heavy relative to its conductive capabilities
Solution Approach 1:
The patent merges multiple functions into a single integrated structure. The dielectric base provides both mechanical support and electrical insulation, while the conductive layer provides both current conduction and structural definition. This consolidation eliminates the need for separate wire insulation and support structures, significantly reducing weight while maintaining flexibility and electrical performance.
Solution Approach 2:
The patent employs thin-film conductive layers deposited on flexible dielectric substrates. This approach creates lightweight, flexible interconnect structures that maintain electrical performance without the bulk and weight of traditional wire harnesses. The thin-film technology enables complex routing patterns in a minimal thickness profile.
3Reliability
If wire harnesses with insulation are used, then electrical isolation is achieved, but heat transfer to surroundings becomes poor necessitating larger wires
Solution Approach 1:
The patent applies electrical insulation selectively rather than uniformly surrounding conductors. The dielectric base provides insulation only where needed for electrical isolation, while allowing direct thermal contact between the conductive layer and the dielectric substrate. This localized insulation approach maintains electrical safety while enabling efficient heat transfer from conductors to the dielectric base and surrounding environment.
Solution Approach 2:
The patent transitions from one-dimensional wire-based heat dissipation to two-dimensional planar heat transfer. The thin-film conductive structure allows heat to spread laterally across the dielectric base surface, significantly increasing the effective heat dissipation area. This dimensional change enables superior thermal management without requiring larger conductor cross-sections.
4Ease of manufacture
If conventional PCB processes are used, then chemical etching can form traces, but access to the base-side surface of conductive traces through the dielectric base is difficult
Solution Approach 1:
The patent inverts the traditional PCB construction approach. Instead of forming conductive traces on one side of a thick dielectric and trying to access them through the dielectric, the conductive layer is formed on the same side as the intended access point. The dielectric base is then laminated to provide support and insulation, allowing easy access to conductive trace surfaces without requiring penetration through the dielectric material.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the creation of interconnect circuits that can carry high currents, manage heat effectively, and form complex patterns, overcoming the limitations of conventional methods by using new patterning techniques and materials, resulting in lighter and more thermally efficient designs.
Implementation Method 1
Pattern opening may be formed by techniques including, but not limited to, chemical etching
Implementation Method 2
A substrate may be laminated to a conductive layer... a first insulator may be laminated to the first side of the conductive layer
Data Source
AI summary
Provided are interconnect circuits and methods of forming thereof. A method may involve laminating a substrate to a conductive layer followed by patterning the conductive layer. This patterning operation forms individual conductive portions, which may be also referred to as traces or conductive islands. The substrate supports these portions relative to each other during and after patterning. After patterning, an insulator may be laminated to the exposed surface of the patterned conductive layer. At this point, the conductive layer portions are also supported by the insulator, and the substrate may optionally be removed, e.g., together with undesirable portions of the conductive layer. Alternatively, the substrate may be retained as a component of the circuit and the undesirable portions of the patterned conductive layer may be removed separately. These approaches allow using new patterning techniques as well as new materials for substrates and/or insulators.