Laser Drilling Dielectric Layers Without Copper Foils

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Solution Overview

Problem

The challenge in manufacturing component carriers is the formation of undesired lateral overhangs during laser drilling of through holes in dielectric layers with copper foils, leading to cracks, voids, and reduced electric reliability, especially in thin core layers where front-to-back side offsets and bottle holes are common.

Innovation Solution

A method involving laser drilling of through holes directly in a purely dielectric layer without copper coverage, followed by galvanic plating to form an integral conductive structure with a conductive bridge and bulk structures, ensuring no overhang and improved reliability by maintaining a minimum distance between the sidewall and conductive bulk structure.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If copper foils are placed on both opposing main surfaces of a dielectric central layer during laser drilling, then electrical conductivity is improved, but lateral overhang of copper beyond the dielectric layer occurs causing cracks and voids

Engineering Contradiction:
Improveelectrical reliabilityVSAvoidthrough hole formation precision
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent applies preliminary action by forming a via hole through the dielectric layer using a drill bit before placing the copper foil. This sequence prevents the copper from causing overhang during laser drilling, as the hole is already formed. The copper is then deposited into the pre-formed via hole, ensuring precise filling without lateral overhang beyond the dielectric layer boundaries.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If laser drilling is performed on dielectric layers with copper coverage, then through holes are formed efficiently, but overhang and bottle holes occur reducing reliability

Engineering Contradiction:
Improvethrough hole formation efficiencyVSAvoidelectric reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent performs preliminary drilling of via holes through the dielectric layer with a drill bit before applying copper foil. This preliminary action creates a precise hole geometry that prevents overhang and bottle hole formation during subsequent copper filling, while maintaining efficient through hole formation overall by combining mechanical drilling with selective copper deposition.

Inventive Principle:
Principle #10Preliminary action

3Volume of moving object

If thin core layers are used for miniaturization, then component carrier size is reduced, but front-to-back side offsets and bottle holes increase

Engineering Contradiction:
Improvecomponent carrier sizeVSAvoidthrough hole alignment precision
Core Design Contradiction:
Volume of moving objectVSManufacturing precision

Solution Approach 1:

The patent uses preliminary mechanical drilling with a drill bit to create via holes through thin core layers before copper deposition. This preliminary action establishes precise hole geometry and position, preventing front-to-back side offsets and bottle hole formation even in thin core layers. The drill bit ensures accurate hole formation that maintains alignment precision during subsequent copper filling processes.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach prevents overhangs and voids, enhances electric reliability, and maintains mechanical and thermal stability, even in thin core layers, by ensuring proper adhesion and filling of conductive material without copper-related issues.

Implementation Method 1

forming a through hole (in particular a laser through hole) between a first main surface and a second main surface of an electrically insulating layer structure by removing material from at least the first main surface of the electrically insulating layer structure (in particular by irradiating at least the first main surface of the electrically insulating layer structure with at least one laser shot)

Methodology Applied
Scientific EffectLaser ablation: Laser Ablation

Implementation Method 2

subsequently at least partially covering sidewalls delimiting the through hole and at least partially covering the first main surface of the electrically insulating layer structure by an electrically conductive medium to form an integral electrically conductive structure. The integral electrically conductive structure is formed by at least two galvanic plating processes

Methodology Applied
Scientific EffectGalvanic plating: Electroplating

Data Source

PatentUS10531577B1Forming through holes through exposed dielectric material of component carrier
Publication Date: 2020.01.07 AT & S AUSTRIA TECHNOLOGIE & SYSTEMTECHNIK AG
  • US10531577B1 patent drawing
  • US10531577B1 patent drawing
  • US10531577B1 patent drawing

AI summary

A method of manufacturing a component carrier is provided. The method includes forming a through hole between a first main surface and a second main surface of an electrically insulating layer structure by removing material from at least one of the main surfaces of the electrically insulating layer structure, in particular by irradiating at least one of the main surfaces of the electrically insulating layer structure with at least one laser shot, wherein the at least one main surface from which material is removed, in particular which is to be irradiated, is not covered by an electrically conductive layer structure at least in a surface region in which the through hole is to be formed, and subsequently at least partially filling the through hole and at least partially covering the main surfaces of the electrically insulating layer structure by an electrically conductive filling medium.