Laser Light Source Co-Packaged with Photonic Integrated Circuit

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Solution Overview

Problem

Silicon photonics technology faces inefficiencies due to poor heat sinking in photonic integrated circuits (PICs), limiting light source output power and increasing system size, and requiring precise alignment which is difficult to achieve.

Innovation Solution

An integrated optics assembly with an optics mount that bridges the PIC and a substrate with a heat sink, allowing for efficient heat dissipation and reducing system size by positioning the light source on one end of the optics mount coupled to the substrate and the other end to the PIC, thereby enhancing thermal efficiency and optical power delivery.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the light source is mounted directly on the PIC, then the coupling efficiency is improved, but the thermal efficiency deteriorates due to poor heat sinking

Engineering Contradiction:
Improvecoupling efficiencyVSAvoidthermal efficiency
Core Design Contradiction:
ReliabilityVSTemperature

Solution Approach 1:

The system is divided into separate functional modules: the light source is mounted on a separate substrate away from the PIC, connected via an edge coupler. This segmentation allows the light source to be thermally managed independently from the PIC, resolving the contradiction between coupling efficiency and thermal efficiency.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

An edge coupler acts as an intermediary component between the light source and the PIC. This intermediary enables efficient optical coupling while maintaining physical separation that allows independent thermal management, thus resolving the trade-off between coupling efficiency and heat dissipation.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If the light source is positioned adjacent to the PIC for edge coupling, then the coupling efficiency is improved, but the system footprint increases and alignment becomes more difficult

Engineering Contradiction:
Improvecoupling efficiencyVSAvoidalignment complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The light source, edge coupler, and PIC are separately prepared with pre-defined coupling interfaces and alignment features before final assembly. This preliminary preparation simplifies the final integration process and reduces alignment complexity during system assembly.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The design optimizes geometric parameters such as the positioning of the edge coupler, the dimensions of coupling interfaces, and the spacing between components to achieve efficient coupling while minimizing alignment sensitivity and system footprint.

Inventive Principle:
Principle #35Parameter changes

3Device complexity

If the light source is mounted on the PIC, then the optical coupling is simplified, but the available output power is limited due to poor heat sinking

Engineering Contradiction:
Improvecoupling simplicityVSAvoidoutput power
Core Design Contradiction:
Device complexityVSPower

Solution Approach 1:

By segmenting the light source from the PIC and mounting it on a separate substrate with independent thermal management, the system removes the thermal bottleneck that limited output power, while maintaining optical coupling through the edge coupler.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The light source is extracted from the PIC structure and placed on a separate substrate with dedicated heat sinking capabilities. This extraction removes the thermal constraints imposed by the PIC's limited heat dissipation, enabling higher output power while maintaining optical coupling.

Inventive Principle:
Principle #2Taking out (Extraction)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration increases thermal efficiency, allowing the light source to deliver more optical power, reduces system size, and simplifies alignment, thereby enhancing the overall performance and compactness of the integrated optics assembly.

Implementation Method 1

The heat sink may increase the thermal efficiency of the integrated optics assembly by extracting heat from the light source

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Implementation Method 2

The optics mount may comprise a lens configured to focus a beam of light from the light source

Methodology Applied
Scientific EffectOptical focusing: Lens

Implementation Method 3

a prism or a microelectromechanical systems (MEMS) mirror positioned on the second end of the optics mount, wherein the prism or the MEMS mirror is configured to receive the beam of light from the lens and redirect it towards the PIC

Methodology Applied
Scientific EffectOptical reflection: Reflection

Data Source

PatentUS11564312B2Laser light source co-packaged with photonic integrated circuit and substrate
Publication Date: 2023.01.24 GOOGLE LLC
  • US11564312B2 patent drawing
  • US11564312B2 patent drawing
  • US11564312B2 patent drawing

AI summary

The present disclosure provides for an example integrated optics assembly. The integrated optics assembly may include an optics mount, a substrate including a heat sink, and a photonic integrated circuit (“PIC”). The optics mount may be adapted to support a light source on a first end of the optics mount. The first end of the optics mount may be coupled to a region of the substrate including the heat sink. The heat sink may remove or dissipate the heat produced by the light source. A second end of the optics mount may be coupled to the PIC such that the optics mount extends between the substrate and the PIC. This may decrease the amount of space the optics mount takes up on the PIC thereby allowing the overall size of the PIC to be decreased. Decreasing the size of the PIC may allow for more PICS per wafer.