Latch Circuit Soft Error Protection via Dynamic Width Adjustment
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Solution Overview
Problem
Semiconductor memory devices face issues with latch circuits being vulnerable to soft errors due to neutron-induced changes, leading to loss of stored repair information and malfunction during repair operations.
Innovation Solution
The implementation of a latch-width adjusting circuit that couples enable fuses and address fuses of unused latch sets in the latch circuit after boot-up, effectively increasing the latch width and preventing neutron-induced soft errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If the latch circuit maintains a narrow width to reduce area, then area is saved, but the circuit becomes more vulnerable to neutron-induced soft errors
Solution Approach 1:
The latch circuit dynamically adjusts its width based on operational phase. During boot-up, the latch width is reduced to save area. After boot-up completion, the latch-width adjusting circuit couples adjacent latch sets to expand the effective latch width, thereby reducing vulnerability to neutron-induced soft errors during normal operation without permanently increasing area occupation.
Solution Approach 2:
The invention changes the physical parameter of latch width from a fixed value to a variable that can be adjusted based on operational requirements. The latch-width adjusting circuit modifies the effective width parameter by coupling enable latches with adjacent address latches after boot-up, thereby changing the circuit's soft error susceptibility without permanently altering the physical layout.
2Area of stationary object
If the latch circuit uses a fixed narrow width, then area is minimized, but latch inversion occurs due to soft errors during normal operation
Solution Approach 1:
The latch circuit transitions from a static narrow configuration during boot-up to a dynamic expanded configuration after boot-up completion. The latch-width adjusting circuit enables this transition by coupling adjacent latch sets, thereby stabilizing the stored repair information against soft errors during normal operation while maintaining area efficiency during the boot-up phase.
Solution Approach 2:
The latch-width adjusting circuit is pre-configured to couple adjacent latch sets after boot-up completion. This preliminary arrangement ensures that when repair information is stored in the latch circuit, the circuit is already in a stable, expanded state that protects against soft errors, rather than requiring post-storage protection measures.
3Reliability
If the latch circuit expands width after boot-up to prevent soft errors, then reliability improves, but device complexity increases
Solution Approach 1:
The latch-width adjusting circuit serves multiple functions: it couples enable latches with adjacent address latches to expand latch width, it enables dynamic reconfiguration based on operational phase, and it provides soft error protection without requiring separate protection circuits. This multi-functionality reduces the need for additional dedicated components, thereby limiting the increase in device complexity.
Solution Approach 2:
The invention merges the enable latch and adjacent address latch into a coupled structure after boot-up completion. By combining these previously separate latch sets through the latch-width adjusting circuit, the patent achieves increased soft error resistance without adding entirely new components, thereby limiting complexity growth through consolidation of existing elements.
Data Source
AI summary
A latch circuit includes a plurality of latch sets, each including an enable latch and a plurality of address latches; and a plurality of latch-width adjusting circuits respectively corresponding to the latch sets, wherein, in each of the plurality of latch sets, the corresponding latch-width adjusting circuit is disposed between the enable latch of the corresponding latch set and the address latch adjacent to the enable latch, and couples the enable latch to the adjacent address latch depending on whether or not the corresponding latch set is used, at an end of a boot-up operation.