Latchup Detection Circuit Using Supply Voltage Comparison
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing radiation-hardened designs for integrated circuits do not effectively detect latchup events on a system level, which can cause damage or performance issues due to parasitic bipolar triggers from radiation particles, and there is no mechanism to detect such events after they occur.
Innovation Solution
A latchup detector system comprising a level shifter and a comparator that measures the difference between regulator and target supply voltages, producing an interrupt signal when the voltage difference exceeds a programmable threshold, and a clock-loss detector circuit that monitors clock edges to detect voltage changes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If guard rings are used to separate NMOS and PMOS transistors to reduce latchup risk, then latchup protection is improved, but active area increases
Solution Approach 1:
The patent introduces an intermediary detection mechanism (voltage monitor circuit) that indirectly detects latchup events by monitoring voltage drops across the supply rail, rather than directly protecting each transistor with guard rings. This mediator approach provides system-level latchup detection without requiring physical separation of transistors, thus avoiding the area penalty while maintaining reliability.
2Reliability
If TMR or RC filtering is used to make digital registers more robust to radiation, then radiation hardness is improved, but system-level latchup detection capability remains insufficient
Solution Approach 1:
The patent transitions from component-level radiation hardening (TMR, RC filtering in individual registers) to system-level detection by adding a new dimension of monitoring. The voltage monitor circuit operates at the system level, detecting latchup events across the entire chip by monitoring supply rail voltage, thereby providing comprehensive detection capability that component-level approaches cannot achieve.
3Device complexity
If no detection mechanism is implemented, then device complexity is reduced, but ability to detect and respond to latchup events is lost
Solution Approach 1:
The patent implements a feedback mechanism where the voltage monitor circuit continuously monitors the supply rail voltage and provides feedback about latchup events. When a voltage drop exceeding a threshold is detected, the circuit generates an interrupt signal that feeds back to the system, enabling real-time detection and response to latchup events without requiring complex preventive measures.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables system-level detection of latchup events, allowing for proactive measures like shutting down power supplies, and detects clock loss, thereby protecting integrated circuits from radiation-induced damage.
Implementation Method 1
a first level-shifter circuit configured to lower the regulator output voltage to a first voltage; and a second level-shifter circuit configured to lower the target supply voltage to a second voltage
Implementation Method 2
the comparator configured to produce a first output voltage when a difference between the first and second voltages is greater than or equal to a predetermined voltage difference and a second output voltage when the difference between the first and second voltages is less than the predetermined voltage difference
Data Source
AI summary
A latchup detector includes a level shifter and a comparator. The level shifter is electrically coupled to a voltage supply rail to receive as inputs a regulator output voltage and a target supply voltage. The level shifter includes a first level-shifter circuit that lowers the regulator output voltage to a first voltage and a second level-shifter circuit that lowers the target supply voltage to a second voltage. The comparator receives as inputs the first and second voltages. The comparator produces a first output voltage when the difference between the first and second voltages is greater than or equal to a predetermined voltage difference and a second output voltage when the difference between the first and second voltages is less than the predetermined voltage difference. The first output voltage can correspond to a latchup event.