Lateral DMOS Device with Segmented Dopant Region for Leakage Reduction
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Solution Overview
Problem
Existing semiconductor devices for high-voltage operation in single-chip systems face challenges with circuit leakage and off current due to high surface electric fields, which are not adequately addressed by current insulated gate bipolar transistor (IGBT) and double-diffused metal oxide semiconductor (DMOS) transistor devices.
Innovation Solution
A lateral-diffused metal oxide semiconductor device is developed with a dopant region between the gate and drain, forming PN-junctions between the dopant region and the deep well, which reduces circuit leakage and off current by creating an asymmetric structure with isolation structures and specific doping concentrations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional IGBT and DMOS transistor devices are used for high-voltage operation in single-chip systems, then power device functionality is achieved, but circuit leakage and off current increase due to high surface electric fields
Solution Approach 1:
The device structure is segmented into multiple regions including a first dopant region, a second dopant region, and a third dopant region with different conductive types and doping concentrations. This segmentation creates multiple PN-junctions that divide and control the electric field distribution, preventing excessive surface electric field concentration and reducing circuit leakage and off current.
Solution Approach 2:
Different dopant regions are assigned different local qualities including varying conductive types (first conductive type, second conductive type) and doping concentrations (first doping concentration, second doping concentration, third doping concentration). This local quality variation optimizes the electric field distribution at specific locations, effectively reducing surface electric field intensity and associated leakage currents.
2Reliability
If a dopant region is added between gate and drain to reduce leakage, then circuit leakage and off current decrease, but device structure becomes more complex
Solution Approach 1:
Multiple dopant regions with different conductive types and doping concentrations are merged into a single integrated device structure between the gate and drain. This merging approach achieves effective leakage reduction through combined PN-junctions while maintaining a unified device architecture, balancing performance improvement with structural complexity.
Solution Approach 2:
The dopant regions are nested within the device structure, with the first dopant region, second dopant region, and third dopant region positioned in a nested arrangement between the gate and drain. This nesting allows multiple functional regions to be integrated in a compact manner, reducing leakage effectiveness while minimizing the increase in overall device complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces circuit leakage and off current (Ioff) while minimizing the surface electric field, enhancing the operational efficiency and integration capabilities of the device.
Implementation Method 1
forming PN-junctions between the dopant region and the deep well, which reduces circuit leakage and off current
Implementation Method 2
reduces circuit leakage, surface electric field and off current (Ioff)
Data Source
AI summary
A lateral-diffused metal oxide semiconductor device including a substrate, a second deep well, a gate, a source, a drain and a first dopant region is provided. The substrate includes a first deep well having a first conductive type. The second deep well having a second conductive type is disposed in the first deep well. The gate is disposed on the substrate and the boundary of the first and the second deep well. The source and the drain having a second conductive type are disposed beside the gate and in the first deep well and the second deep well respectively. The first dopant region having a first conductive type is disposed in the second deep well, wherein the first dopant region is separated from the drain. Moreover, a method for fabricating said lateral-diffused metal oxide semiconductor device is also provided.


